EP1SGX10DF672C6N Altera, EP1SGX10DF672C6N Datasheet - Page 259
![IC STRATIX GX FPGA 10KLE 672FBGA](/photos/6/72/67292/544-672-fbga_sml.jpg)
EP1SGX10DF672C6N
Manufacturer Part Number
EP1SGX10DF672C6N
Description
IC STRATIX GX FPGA 10KLE 672FBGA
Manufacturer
Altera
Series
Stratix® GXr
Datasheet
1.EP1SGX10CF672C7N.pdf
(272 pages)
Specifications of EP1SGX10DF672C6N
Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
362
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
672-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Part Number
Manufacturer
Quantity
Price
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Altera Corporation
June 2006
1.8 V
1.5 V
LVCMOS
GTL
GTL+
SSTL-3 class I
SSTL-3 class II
SSTL-2 class I
SSTL-2 class II
SSTL-18 class I
SSTL-18 class II
1.5-V HSTL class I
1.5-V HSTL class II
1.8-V HSTL class I
1.8-V HSTL class II
3.3-V PCI
3.3-V PCI-X 1.0
Compact PCI
AGP 1×
AGP 2×
CTT
Differential HSTL
Differential SSTL-2
LVDS
LVPECL
PCML
HyperTransport technology
LVTTL
2.5 V
1.8 V
Table 6–84. Stratix GX Maximum Output Clock Rate for PLL[5, 6, 11, 12] Pins (Part 2 of 2)
Table 6–85. Stratix GX Maximum Output Clock Rate (Using I/O Pins) for PLL[1, 2] Pins (Part 1 of 2)
I/O Standard
I/O Standard
-5 Speed Grade -6 Speed Grade -7 Speed Grade
-5 Speed Grade -6 Speed Grade -7 Speed Grade
250
225
350
200
200
167
167
200
200
150
150
250
225
250
225
350
350
350
350
350
200
225
200
500
500
350
350
400
400
400
250
200
300
167
167
150
150
200
200
133
133
225
200
225
200
300
300
300
300
300
200
200
200
500
500
350
350
350
350
350
Stratix GX Device Handbook, Volume 1
DC & Switching Characteristics
250
200
250
125
125
133
133
167
167
133
133
200
200
200
200
250
250
250
250
250
200
200
167
500
500
350
350
300
300
300
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
MHz
MHz
MHz
Unit
6–57
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