EP1SGX25DF672I6 Altera, EP1SGX25DF672I6 Datasheet - Page 271

IC STRATIX GX FPGA 25K 672-FBGA

EP1SGX25DF672I6

Manufacturer Part Number
EP1SGX25DF672I6
Description
IC STRATIX GX FPGA 25K 672-FBGA
Manufacturer
Altera
Series
Stratix® GXr
Datasheet

Specifications of EP1SGX25DF672I6

Number Of Logic Elements/cells
25660
Number Of Labs/clbs
2566
Total Ram Bits
1944576
Number Of I /o
455
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
672-FBGA
Family Name
Stratix GX
Number Of Logic Blocks/elements
25660
# I/os (max)
455
Frequency (max)
5GHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.5V
Logic Cells
25660
Ram Bits
1944576
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
672
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant

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Software
Device Pin-Outs
Ordering
Information
Figure 7–1. Stratix GX Device Packaging Ordering Information
Altera Corporation
February 2005
10
25
40
F: FineLine BGA
EP1SGX: Stratix GX
C: 4
D: 8
F: 16
G: 20
SGX51007-1.0
Package Type
Device Type
Transceiver
Family Signature
Number of
Channels
EP1SGX
Stratix
software, which provides a comprehensive environment for system-on-a-
programmable-chip (SOPC) design. The Quartus II software includes
hardware description language and schematic design entry, compilation
and logic synthesis, full simulation and advanced timing analysis,
SignalTap
Software Selector Guide for more details on the Quartus II software
features.
The Quartus II software supports the Windows 2000/NT/98, Sun Solaris,
Linux Red Hat v6.2 and HP-UX operating systems. It also supports
seamless integration with industry-leading EDA tools through the
NativeLink
Device pin-outs for Stratix GX devices will be released on the Altera web
site (www.altera.com).
Figure 7–1
40
®
GX devices are supported by the Altera
G
®
describes the ordering codes for Stratix GX devices.
®
logic analysis, and device configuration. See the Design
F
interface.
Number of pins for a particular FineLine BGA package
Pin Count
1020
C
7. Reference & Ordering
7
N
5, 6, or 7, with 5 being the fastest
C: Commercial temperature (t
Indicates specific device options or
shipment method.
ES:
I: Industrial temperature (t
N:
Speed Grade
Optional Suffix
Operating Temperature
Lead free
Engineering sample
®
Quartus
Information
j
= -40˚ C to 100˚ C )
®
j
II design
= 0˚ C to 85˚ C )
7–1

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