XC5VLX30T-1FFG665CES Xilinx Inc, XC5VLX30T-1FFG665CES Datasheet - Page 263
![IC FPGA VIRTEX-5 ES 30K 665FCBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VLX30T-1FFG665CES
Manufacturer Part Number
XC5VLX30T-1FFG665CES
Description
IC FPGA VIRTEX-5 ES 30K 665FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX30T-1FFG665CES
Number Of Logic Elements/cells
30720
Number Of Labs/clbs
2400
Total Ram Bits
1327104
Number Of I /o
360
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
665-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
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Part Number
Manufacturer
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Company:
Part Number:
XC5VLX30T-1FFG665CES
Manufacturer:
Xilinx Inc
Quantity:
10 000
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Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
HSTL Class I (1.8V)
Figure 6-53
Class I (1.8V).
X-Ref Target - Figure 6-53
Table 6-21
Table 6-21: HSTL Class I (1.8V) DC Voltage Specifications
Notes:
1. V
2. Per EIA/JESD8-6, “The value of V
V
V
V
V
V
V
V
I
I
OH
OL
CCO
REF
TT
IH
IL
OH
OL
the use conditions specified by the user.”
OL
at V
at V
(2)
and V
External Termination
DCI
OL
OH
HSTL_I_DCI_18
lists the HSTL Class I (1.8V) DC voltage specifications.
(mA)
shows a sample circuit illustrating a valid termination technique for HSTL
HSTL_I_18
OH
(mA)
for lower drive currents are sample tested.
(1)
(1)
IOB
IOB
Figure 6-53: HSTL Class I (1.8V) Termination
www.xilinx.com
REF
Z 0
Z 0
R P = Z 0 = 50Ω
is to be selected by the user to provide optimum noise margin in
Specific Guidelines for I/O Supported Standards
V
V
V
CCO
REF
V
TT
IOB
Min
0.83
CCO
1.7
–8
–
–
–
8
= 0.9V
+ 0.1
– 0.4
= 1.8V
2R
2R
VRP
VRN
IOB
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
V
V
REF
REF
V
CCO
= 0.9V
= 0.9V
Typ
1.8
0.9
–
–
–
–
–
–
× 0.5
HSTL_I_DCI_18
HSTL_I_18
ug190_6_50_030306
+
–
+
–
V
REF
Max
1.08
1.9
0.4
–
–
–
–
–
– 0.1
263
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