CY7C65113C-SXC Cypress Semiconductor Corp, CY7C65113C-SXC Datasheet - Page 11

• Manufacturer Part Number: CY7C65113C-SXC
• Description: IC MCU 8K FULL SPEED USB 28-SOIC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C65113C-SXC

• Applications: USB Hub/Microcontroller
• Core Processor: M8
• Program Memory Type: OTP (8 kB)
• Controller Series: USB Hub
• Ram Size: 256 x 8
• Interface: I²C, USB
• Number Of I /o: 11
• Voltage - Supply: 4 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: (8051) USB
• No. Of I/o's: 11
• Ram Memory Size: 256Byte
• Cpu Speed: 48MHz
• No. Of Timers: 1
• Digital Ic Case Style: SOIC
• Core Size: 8 Bit
• Program Memory Size: 8KB
• Embedded Interface Type: I2C, USB
• Rohs Compliant: Yes
• Processor Series: CY7C65xx
• Core: M8
• Data Bus Width: 16 bit
• Data Ram Size: 256 B
• Interface Type: I2C
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 11
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: CY3654, CY3654-P03
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3649 - PROGRAMMER HI-LO USB M8428-1339 - KIT LOW SPEED PERSONALITY BOARD
• Lead Free Status / Rohs Status: Details
• Other names: 428-2259-5; CY7C65113C-SXC

8-bit Data Stack Pointer (DSP)
The Data Stack Pointer (DSP) supports PUSH and POP instruc-
tions that use the data stack for temporary storage. A PUSH
instruction pre-decrements the DSP, then writes data to the
memory location addressed by the DSP. A POP instruction reads
data from the memory location addressed by the DSP, then
post-increments the DSP.
During a reset, the DSP is reset to 0x00. A PUSH instruction
when DSP equals 0x00 writes data at the top of the data RAM
(address 0xFF). This writes data to the memory area reserved
for USB endpoint FIFOs. Therefore, the DSP should be indexed
at an appropriate memory location that does not compromise the
Program Stack, user-defined memory (variables), or the USB
endpoint FIFOs.
For USB applications, the firmware should set the DSP to an
appropriate location to avoid a memory conflict with RAM
dedicated to USB FIFOs. The memory requirements for the USB
endpoints are described in Section 17.2. Example assembly
instructions to do this with two device addresses (FIFOs begin at
0xD8) are shown below:
Address Modes
The CY7C65113 microcontrollers support three addressing
modes for instructions that require data operands: data, direct,
and indexed.
Data (Immediate)
“Data” address mode refers to a data operand that is actually a
constant encoded in the instruction. As an example, consider the
instruction that loads A with the constant 0xD8:
This instruction requires two bytes of code where the first byte
identifies the “MOV A” instruction with a data operand as the
Clocking
Document #: 38-08002 Rev. *F
• MOV A, 0D8h.
MOV A,20h
or less)
SWAP A,DSP ; swap accumulator value into DSP register.
; Move 20 hex into Accumulator (must be D8h
Figure 3. Clock Oscillator On-Chip Circuit
XTALOUT
(pin 1)
XTALIN
(pin 2)
30 pF
30 pF
second byte. The second byte of the instruction is the constant
“0xD8.” A constant may be referred to by name if a prior “EQU”
statement assigns the constant value to the name. For example,
the following code is equivalent to the example shown above:
Direct
“Direct” address mode is used when the data operand is a
variable stored in SRAM. In that case, the one byte address of
the variable is encoded in the instruction. As an example,
consider an instruction that loads A with the contents of memory
address location 0x10:
Normally, variable names are assigned to variable addresses
using “EQU” statements to improve the readability of the
assembler source code. As an example, the following code is
equivalent to the example shown above:
Indexed
“Indexed” address mode allows the firmware to manipulate
arrays of data stored in SRAM. The address of the data operand
is the sum of a constant encoded in the instruction and the
contents of the “X” register. Normally, the constant is the “base”
address of an array of data and the X register contains an index
that indicates which element of the array is actually addressed:
This would have the effect of loading A with the fourth element
of the SRAM “array” that begins at address 0x10. The fourth
element would be at address 0x13.
• DSPINIT: EQU 0D8h
• MOV A, DSPINIT.
• MOV A, [10h].
• buttons: EQU 10h
• MOV A, [buttons].
• array: EQU 10h
• MOV X, 3
• MOV A, [X+array].
To Internal PLL
CY7C65113C
Page 11 of 48
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