MC68SEC000AA16 Freescale Semiconductor, MC68SEC000AA16 Datasheet - Page 139

• Manufacturer Part Number: MC68SEC000AA16
• Description: IC MPU 32BIT 16MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68SEC000AA16

• Processor Type: M680x0 32-Bit
• Speed: 16MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 64-QFP
• Processor Series: M680xx
• Core: CPU32
• Maximum Clock Frequency: 16 MHz
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Cpu Speed: 16MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 64
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Frequency Typ: 20MHz
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Clock Frequency: 16MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9.4.9 Timer Interrupt Mask 2 Register
Use this 8-bit register to enable or inhibit timer overflow and real-time interrupts. The timer prescaler
control bits are included in this register.
TOI — Timer Overflow Interrupt Enable Bit
RTII — Real-Time Interrupt Enable Bit
PAOVI — Pulse Accumulator Overflow Interrupt Enable Bit
PAII — Pulse Accumulator Input Edge Interrupt Enable Bit
Bits [3:2] — Unimplemented
PR[1:0] — Timer Prescaler Select Bits
Freescale Semiconductor
Refer to
Refer to
Refer to
Always read 0
These bits are used to select the prescaler divide-by ratio. In normal modes, PR[1:0] can be written
only once, and the write must be within 64 cycles after reset. Refer to
specific timing values.
0 = TOF interrupts disabled
1 = Interrupt requested when TOF is set to 1
9.5 Real-Time Interrupt
9.7.3 Pulse Accumulator Status and Interrupt
9.7.3 Pulse Accumulator Status and Interrupt
Address:
Bits in TMSK2 correspond bit for bit with flag bits in TFLG2. Bits in TMSK2
enable the corresponding interrupt sources.
Reset:
Read:
Write:
$1024
Figure 9-19. Timer Interrupt Mask 2 Register (TMSK2)
Bit 7
TOI
0
= Unimplemented
RTII
6
0
M68HC11E Family Data Sheet, Rev. 5.1
(RTI).
PR[1:0]
Table 9-4. Timer Prescale
0 0
0 1
1 0
1 1
PAOVI
5
0
NOTE
PAII
4
0
Bits.
Bits.
Prescaler
3
0
16
1
4
8
2
0
Table 9-1
PR1
1
0
and
Bit 0
PR0
0
Table 9-4
Output Compare
for
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