MC68060RC50 Freescale Semiconductor, MC68060RC50 Datasheet - Page 42

• Manufacturer Part Number: MC68060RC50
• Description: IC MPU 32BIT 50MHZ 206-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68060RC50

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 206-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 50MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Operating Temp Range: 0C to 110C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 206
• Package Type: PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Introduction
1-18
FRESTORE
FMOVEM
FMOVEM
FTRAPcc 2
FSGLMUL
FSGLDIV
ILLEGAL
Opcode
FINTRZ
FMOVE
FMOVE
FSQRT
FSAVE
FMUL
FNEG
FNOP
FScc 2
FSUB
FTST
FINT
JMP
9
9
Floating-Point Integer Part
Floating-Point Integer Part, Round-to-Zero
Source ˘ Destination
Source ˘ Destination
Register List ˘ Destination
Source ˘ Register List
Register List ˘ Destination
Source ˘ Register List
Source
–(Source) ˘ FPn
None
If in supervisor state
else TRAP
If in supervisor state
else TRAP
If condition true
else 0s ˘ Destination
FPn
Source
Square Root of Source ˘ FPn
FPn – Source ˘ FPn
If condition true
Condition Codes for Operand ˘ FPCC
SSP – 2 ˘ SSP; Vector Offset ˘ (SSP);
SSP – 4 ˘ SSP; PC ˘ (SSP);
SSp – 2 ˘ SSP; SR ˘ (SSP);
Illegal Instruction Vector Address ˘ PC
Destination Address ˘ PC
Source ˘ FPn
then FPU State Frame ˘ Internal State
then FPU Internal State ˘ State Frame
then 1s ˘ Destination
then TRAP
FPn ˘ FPn
FPn ˘ FPn
Table 1-3. Instruction Set Summary (Continued)
Operation
M68060 USER’S MANUAL
FINT.<fmt><ea>,FPn
FINT.X FPm,FPn
FINT.X FPn
FINTRZ.<fmt><ea>,FPn
FINTRZ.X FPm,FPn
FINTRZ.X FPn
FMOVE.<fmt> <ea>,FPn
FMOVE.<fmt> FPm,<ea>
FMOVE.P FPm,<ea>{Dn}
FMOVE.P FPm,<ea>{#k}
FrMOVE.<fmt> <ea>,FPn
FMOVE.L <ea>,FPcr
FMOVE.L FPcr,<ea>
FMOVEM.X <list>,<ea>
FMOVEM.X Dn,<ea>
FMOVEM.X <ea>,<list>
FMOVEM.X <ea>,Dn
FMOVEM.L <list>,<ea>
FMOVEM.L <ea>,<list>
FMUL.<fmt> <ea>,FPn
FMUL.X FPm,FPn
FrMUL<fmt> <ea>,FPn
FrMUL.X FPm,FPn
FNEG.<fmt> <ea>,FPn
FNEG.X FPm,FPn
FNEG.X FPn
FrNEG.<fmt> <ea>,FPn
FrNEG.X FPm,FPn
FrNEG.X FPn
FNOP
FRESTORE <ea>
FSAVE <ea>
FScc.SIZE <ea>
FSGLDIV.<fmt> <ea>,FPn
FSGLDIV.X FPm,FPn
FSGMUL.<fmt> <ea>,FPn
FSGLMUL.X FPm, FPn
FSQRT.<fmt> <ea>,FPn
FSQRT.X FPm,FPn
FSQRT.X FPn
FrSQRT.<fmt> <ea>,FPn 3
FrSQRT FPm,FPn3
FrSQRT FPn3
FSUB.<fmt> <ea>,FPn
FSUB.X FPm,FPn
FrSUB.<fmt> <ea>,FPn 3
FrSUB.X FPm,FPn3
FTRAPcc
FTRAPcc.W #<data>
FTRAPcc.L #<data>
FTST.<fmt> <ea>
FTST.X FPm
ILLEGAL
JMP <ea>
3
Syntax
3
3
3
5
5
4
4
MOTOROLA
3
3