GCIXP1200GB Intel, GCIXP1200GB Datasheet - Page 122

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GCIXP1200GB

Manufacturer Part Number
GCIXP1200GB
Description
IC MPU NETWORK 200MHZ 432-BGA
Manufacturer
Intel
Datasheets

Specifications of GCIXP1200GB

Rohs Status
RoHS non-compliant
Processor Type
Network
Features
32-bit StrongARM RISC Core
Speed
200MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
432-BGA
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
Other names
839428

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Manufacturer
Quantity
Price
Part Number:
GCIXP1200GB
Manufacturer:
ERICSSON
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Part Number:
GCIXP1200GB
Manufacturer:
Intel
Quantity:
10 000
Intel
7.3.8.2
122
Figure 62. SRAM Bus Signal Timing
Table 48. SRAM Bus Signal Timing
®
IXP1200 Network Processor
SRAM Bus Signal Timing
1. Timing parameters assume that the system uses a zero delay clock buffer for SCLK before it is distributed to SRAM.
2. When used as a rdy input, HIGH_EN#/RDY# is asynchronous and can change anywhere relative to SCLK.
3. Capacitive loading effects on signal lines are shown in
4. T
5. Timings are what the tester must measure. Add 0.25 nsec to these numbers to obtain system AC parameter. This
6. Not tested. Guaranteed by design.
T
T
T
T
T
T
T
T
Symbol
ctl
suf
sup
on
off
val
hf
hp
additional 0.25 nsec is needed to allow for SRAM drive derating.
Vddx=3.6, Temp=0 degrees C) at 1.15 nsec with an uncertainty of 0.25 nsec. The parameter specified is guaranteed by design
in a minimally configured system environment.
6
6
val
(min) and 166 MHz and 200 MHz T
Clock to data output valid delay
Clock to control outputs valid delay
Data input setup time before SCLKIN for
Flowthru SRAM
Data input setup time before SCLK for
Pipelined SRAM
Input signal hold time from SCLKIN for
Flowthru SRAM
Input signal hold time from SCLK for
Pipelined SRAM
Float-to-active delay from clock
Active-to-float delay from clock
Outputs
Inputs
SCLK
Parameter
5
1
,
2
T
ctl
T
on
(min) parameters are tested under 0 pF load best case conditions (Vdd=2.1,
val(max)
3,4
3,4
Table
1.0
1.25
2
5.5
1
1
1
---
MHz
166
49.
T
su
(IXP1200 Core
Minimum
Speed)
1.0
1.0
2
5.0
1
1
1
---
MHz
200
T
h
0.5
0.5
2
3.10
1
0.75
1
---
T
MHz
232
off
T
val(min)
5.0
5.0
---
---
---
---
---
3
MHz
166
(IXP1200 Core
Maximum
Speed)
4.5
4.5
---
---
---
---
---
3
MHz
200
3.35
3.05
---
---
---
---
---
3
MHz
Datasheet
232
A6989-02
ns
ns
ns
ns
ns
ns
ns
ns
Unit

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