GCIXP1200GB Intel, GCIXP1200GB Datasheet - Page 35

• Manufacturer Part Number: GCIXP1200GB
• Description: IC MPU NETWORK 200MHZ 432-BGA
• Manufacturer: Intel

Specifications of GCIXP1200GB

• Rohs Status: RoHS non-compliant
• Processor Type: Network
• Features: 32-bit StrongARM RISC Core
• Speed: 200MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 432-BGA
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 839428

Datasheet
Table 14. IX Bus Interface Pins (Continued)
EOP/EOP_RX
TK_REQ_OUT/
SOP_TX
TK_REQ_IN/
EOP_TX
TK_OUT
TK_IN
Totals:
IX Bus Signal
Names
AJ11
AJ6
AL5
AA29
AB31
Pin #
I1/O4/
TS
O4
I1/O4
O1
I1
Type
1
1
1
1
1
103
Total
End of Packet Indication.
Transmit Start Of Packet Indication/Token Request Output.
Transmit End Of Packet/Token Request Input.
Token Output.
Used to pass ownership of the IX Bus in a shared IX Bus system
in 64-bit bidirectional IX Bus mode.
In 32-bit unidirectional mode this bit is unused and should be left
unconnected.
Token Input.
64-bit bidirectional IX Bus Mode: A high-to-low transition indicates
that this device has been given ownership of the IX Bus in a
shared IX Bus system.
In 32-bit unidirectional mode, this input is not used and should be
pulled high.
During Reset, used to configure the device as initial IX Bus owner.
1= device is initial owner, 0= device does not own the IX Bus.
TK_IN is sampled from the rising edge of RESET_IN#.
• Receive End of Packet Input in 32-bit unidirectional IX Bus
• Input/Output in 64-bit bidirectional IX Bus mode.
• In a shared IX Bus system, this pin will be tri-stated when
• Output in 32-bit unidirectional IX Bus modes.
• 64-bit bidirectional 3+ MAC shared bus mode, is IX Bus Token
• 64-bit bidirectional 1-2 MAC mode, not used and should be
• 32-bit unidirectional IX Bus modes TK_REQ_IN/EOP_TX is
• 64-bit bidirectional IX Bus modes, single-chip operation, this
• In shared IX Bus mode, an input indicating IX Bus Token
mode.
EOP/EOP_RX is Transmit End of Packet output according to
values programmed in the TFIFO control field. Is Receive End
of Packet input during receive cycles.
passing ownership of the IX Bus.
TK_REQ_OUT/SOP_TX is Transmit Start of Packet output
during transmit according to values programmed in the TFIFO
control field.
Request output indication when high.
left unconnected.
Transmit End of Packet output according to values
programmed in the TFIFO control field.
input should be pulled high.
Request Pending from another device when high.
Intel
Pin Descriptions
®
IXP1200 Network Processor
35