GCIXP1200GB Intel, GCIXP1200GB Datasheet - Page 37

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GCIXP1200GB

Manufacturer Part Number
GCIXP1200GB
Description
IC MPU NETWORK 200MHZ 432-BGA
Manufacturer
Intel
Datasheets

Specifications of GCIXP1200GB

Rohs Status
RoHS non-compliant
Processor Type
Network
Features
32-bit StrongARM RISC Core
Speed
200MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
432-BGA
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
Other names
839428

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Part Number
Manufacturer
Quantity
Price
Part Number:
GCIXP1200GB
Manufacturer:
ERICSSON
Quantity:
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Part Number:
GCIXP1200GB
Manufacturer:
Intel
Quantity:
10 000
6.3.7
Datasheet
Table 17. PCI Interface Pins
PCI Interface Pins
AD[31:0]
CBE#[3:0]
PAR
FRAME#
IRDY#
TRDY#
STOP#
Signal Names
PCI Interface
[31]
[30]
[29]
[28]
[27]
[26]
[25]
[24]
[23]
[22]
[21]
[20]
[19]
[18]
[17]
[16]
[15]
[14]
[13]
[12]
[10]
[11]
[9]
[8]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
[3]
[2]
[1]
[0]
B20
A20
C19
C18
B18
D17
C17
A16
D16
A15
B15
C15
B14
D15
C14
A13
A10
B10
D11
C10
A9
B9
C9
A8
D9
C8
A7
B7
D8
C7
A6
B6
B16
B13
C11
B8
D12
C13
A12
B12
C12
Pin #
I2/O2/
TS
I2/O2/
TS
I2/O2/
TS
I2/O2/
STS
I2/O2/
STS
I2/O2/
STS
I2/O2/
STS
Type
32
4
1
1
1
1
1
Total
Address/data. These signals are multiplexed address and data
bus. The IXP1200 receives addresses as target and drives
addresses as master. It receives write data and drives read data
as target. It drives write data and receives read data as master.
Command byte enables. These signals are multiplexed command
and byte enable signals. The IXP1200 receives commands as
target and drives commands as master. It receives byte enables
as target and drives byte enables as master.
Parity. This signal carries even parity for AD and CBE# pins. It has
the same receive and drive characteristics as the address and
data bus, except that it occurs on the next PCI clock cycle.
FRAME# indicates the beginning and duration of an access. The
IXP1200 receives as target and drives as master.
Initiator ready. Indicates the master’s ability to complete the
current data phase of the transaction. The IXP1200 receives as
target and drives as master.
Target ready. Indicates the target’s ability to complete the current
data phase of the transaction. The IXP1200 drives as target and
receives as master.
Stop. Indicates that the target is requesting the master to stop the
current transaction. The IXP1200 drives as target and receives as
master.
Intel
Pin Descriptions
®
IXP1200 Network Processor
37

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