GCIXP1200GB Intel, GCIXP1200GB Datasheet - Page 29

• Manufacturer Part Number: GCIXP1200GB
• Description: IC MPU NETWORK 200MHZ 432-BGA
• Manufacturer: Intel

Specifications of GCIXP1200GB

• Rohs Status: RoHS non-compliant
• Processor Type: Network
• Features: 32-bit StrongARM RISC Core
• Speed: 200MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 432-BGA
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 839428

Datasheet
Table 12. SRAM Interface Pins (Continued)
CE#[3:0]
SCLK
SCLKIN
SOE#
SWE#
SLOW_WE#
LOW_EN#/DIRW#
HIGH_EN#/RDY#
SLOW_EN#
SP_CE#
SLOW_RD#
Totals:
SRAM Interface
Signal Names
[3]
[2]
[1]
[0]
A26
B26
C26
A27
W31
B24
W30
Y30
W28
D26
C27
Y29
W29
Y31
Pin #
O4
O3
I1
O4
O4
O4
O4
I1/O4
O4
O4
O4
Type
4
1
1
1
1
1
1
1
1
1
1
65
Total
SRAM Bus chip enable outputs. Internally decoded from
SRAM address. Valid during SRAM and BootROM accesses.
SRAM clock output - Frequency is one half the speed of the
core clock (½ * F
SRAM clock input, used to compensate for skew in data path
when using Flowthru SRAMs. Must be connected to SCLK
output when using Flowthru devices. Not used with Pipelined
devices and should be pulled low.
SRAM output enable.
SRAM write enable.
Asynchronous interface write enable (BootROM or MAC
devices).
Low order SRAM bank enable and buffer direction select for
slow interface. When used as the buffer direction select:
0 = write and 1 = read.
High-order SRAM bank enable output and Flash
PROM/BootROM read enable or asynchronous Ready input
from I/O devices. The pin function is determined by
programming SRAM_CSR[19] =1, which enables RDY# or
SRAM_CSR[19] =0, which enables the HIGH_EN# function.
When using the RDY# function, I/O devices must drive this
signal using a wired-OR configuration, which requires a pullup
resistor on this pin. Note that this pin is driven as an output until
SRAM_CSR[19] is set.
Slow device enable: 0 = Slow device (BootROM or SlowPort),
1=SRAM.
Slow asynchronous interface chip enable output.
Slow asynchronous interface read enable output.
core
Intel
).
Pin Descriptions
®
IXP1200 Network Processor
29