PCX8240VTPU200EZD3 Atmel, PCX8240VTPU200EZD3 Datasheet
PCX8240VTPU200EZD3
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PCX8240VTPU200EZD3 Summary of contents
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... The PC8240’s features serve a variety of embedded applications. In this way, the 603e core and peripheral logic remain general-purpose. The PC8240 can be used as either a PCI host or an agent controller. Screening/Quality/Packaging This product is manufactured in full compliance with: • Upscreening based upon Atmel standards • Industrial temperature range (T = -40° +110 C) ...
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General Description Block Diagram Figure 1. Block Diagram PC8240 Additional features: • JTAG/COP interface • Power management I2C 5 IRQs/ 16 Serial Interrupts PC8240 2 The PC8240 integrated processor is comprised of a peripheral logic block and a 32-bit superscalar ...
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Pinout Listing Table 1. PC8240 Pinout Listing Signal Name Package Pin Number PCI Interface Signals – C/BE[0 3] A25 F23 K23 P25 DEVSEL H26 FRAME J24 IRDY K25 LOCK J26 – AD[0 31] C22 D22 B22 B23 D19 B24 A24 ...
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Table 1. PC8240 Pinout Listing (Continued) Signal Name Package Pin Number – SDMA[ SDMA12/SDBA1 P1 SDBA0 P2 – PAR[0 7] AF3 AE3 G4 E2 AE4 AF4 D2 ...
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Table 1. PC8240 Pinout Listing (Continued) Signal Name Package Pin Number TBEN B14 QACK/DA0 F2 CHKSTOP_IN D14 – MAA[0 2] AF2 AF1 AE1 MIV A16 – PMAA[0 2] AD18 AF18 AE19 Test/Configuration Signals – PLL_CFG[0 4]/ A22 B19 A21 B18 ...
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Table 1. PC8240 Pinout Listing (Continued) Signal Name Package Pin Number AVdd C17 AVdd2 AF24 Manufacturing Pins DA2 C25 – DA[11 13] AD26 AF17 AF19 – DA[14 15 Notes: 1. Place pull-up resistors of 120 or less on ...
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... Ratings 2149A–HIREL–05/02 This drawing describes the specific requirements for the PC8240 processor, in compli- ance with Atmel standard screening. 1. MIL-STD-883: Test methods and procedures for electronics. 2. MIL-PRF-38535: General specifications for microcircuits. The microcircuits are in accordance with the applicable documents and as specified herein. The terminal connections are shown in Table 1, “ ...
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Recommended Operating Conditions Table 3. Recommended Operating Conditions (1) Symbol Characteristic Vdd Supply Voltage OVdd I/O Buffer supply for PCI and Standard GVdd Supply Voltages for Memory Bus Drivers AVdd PLL Supply Voltage – CPU Core Logic PLL Supply Voltage ...
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Figure 2. Supply Voltage Sequencing and Separation Cautions 5V 3.3V 2.5V 0 Voltage Regulator Delay Reset Configuration Pins HRST_CPU & HRST_CTRL Notes: 1. Numbers associated with waveform separations correspond to caution numbers listed in Table 3, “Recommended Operat- ing Conditions,” ...
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Thermal Information Thermal Characteristics Thermal Management Information PC8240 10 Figure 3 shows the undershoot and overshoot voltage of the memory interface of the PC8240. Figure 3. Overshoot/Undershoot Voltage 4V GVdd + 5% GVdd VIH Gnd Gnd ± 0.3V VIL Gnd ...
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Figure 5 depicts the die junction-to-ambient thermal resistance for four typical cases heat sink is not attached to the TBGA package and there exists high board- level thermal loading of adjacent components heat sink is ...
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Internal Package Conduction Resistance PC8240 12 The board designer can choose between several types of heat sinks to place on the PC8240. There are several commercially-available heat sinks for the PC8240 provided by the following vendors: Chip Coolers Inc. 333 ...
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Adhesives and Thermal Interface Materials 2149A–HIREL–05/02 A thermal interface material is recommended at the package lid-to-heat sink interface to minimize the thermal contact resistance. For those applications where the heat sink is attached by spring clip mechanism, Figure 7 shows ...
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Heat Sink Selection Example PC8240 14 The board designer can choose between several types of thermal interface. Heat sink adhesive materials should be selected based upon high conductivity, yet adequate mechanical strength to meet equipment shock/vibration requirements. There are several ...
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Power Consideration Table 5. Preliminary Power Consumption Mode 33/66/166 Typical 2.5 Max – FP 3.0 Max – INT 2.7 Doze 1.8 Nap 700 Sleep 500 Mode Typ – OVdd Typ – GVdd Notes: 1. The values include Vdd, AVdd, AVdd2, ...
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... PC8240 16 The document where markings are defined is identified in the related reference docu- ments. Each microcircuit is legible and permanently marked with the following information as minimum: • Atmel Logo, • Manufacturer’s part number,Date-code of inspection lot, • ESD identifier if available, • Country of manufacturing. ...
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See Table 7 on page 17 for the typical drive capability of a specific signal pin based upon the type of output driver associ- ated with that pin as listed in. 4. These specifications are for the default driver ...
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Dynamic Electrical Characteristics Clock AC Specifications Table 9. Clock AC Timing Specifications Num Characteristics and Conditions 1a Frequency of Operation (PCI_SYNC_IN) 1b PCI_SYNC_IN Cycle Time 2, 3 PCI_SYNC_IN Rise and Fall Times 4 PCI_SYNC_IN Duty Cycle Measured at 1.4V 5a ...
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Table 9. Clock AC Timing Specifications (Continued) Num Characteristics and Conditions 18 OSC_IN Cycle Time 19 OSC_IN Rise and Fall Times 20 OSC_IN Duty Cycle Measured at 1.4V 21 OSC_IN Frequency Stability 22 OSC_IN V (Loaded OSC_IN V ...
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Figure 9. DLL Locking Range Loop Delay vs. Frequency of Operation 25 MHz MHz MHz 20 ns 100 MHz Input AC Timing Specifications Table 10. Input AC Timing Specifications Num ...
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All PCI signals are measured from OVdd/2 of the rising edge of PCI_SYNC_IN to 0.4*OVdd of the signal in question for 3.3V PCI signaling levels. See Figure 11. 3. Input timings are measured at the pin ...
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Output AC Timing Specification Table 11. Output AC Timing Specifications (3)(6) Num Characteristics 12a PCI_SYNC_IN to Output Valid, 66 MHz PCI, with MCP pulled-down to logic 0 state. See Figure 14. PCI_SYNC_IN to Output Valid, 33 MHz PCI, with MCP ...
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PCI Signal Output Hold Timing Table 12. Power Management Configuration Register 2-0x72 Bit Name Reset value 6–4 PCI_HOLD_DEL xx0 2149A–HIREL–05/02 Figure 13. AC Test Load for the PC8240 OUTPUT Z0 = 50Ω PIN In order to meet minimum output hold ...
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Figure 14. PCI_HOLD_DEL Affect on Output Valid and Hold Time PCI_SYNC_IN 12a for 33 MHz PCI PCI_HOLD_DEL = 100 PCI INPUTS/OUTPUTS 33 MHz PCI 12a for 66 MHz PCI PCI_HOLD_DEL = 000 PCI INPUTS/OUTPUTS 66 MHz ...
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Table 13. Two-wire Interface Input AC Timing Specifications (Continued) Num Characteristics 6 Clock high period (Time needed to either receive a data bit or generate a START or STOP.) 7 Data setup time 8 Start condition setup time (for repeated ...
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Table 14. PC8240 Maximum Two-wire Interface Input Frequency (Continued) (2) FDR Hex 14, 15 16, 17, 3A, 3B, 3C, 3D 12288, 14336, 15360, 16384, 20480, 24576 18, 19 1A, 1B, 3E, 3F 24576, 28672, 30720, 1C, 1D 1E, 1F Notes: ...
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Specified at a nominal 50 pF load the decimal divider number indexed by FDR[5:0] value. Refer to the FDR Bit Clock Frequency Divider Selections table. FDR[x] refers to the Frequency Divider Register I2CFDR bit x. N ...
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Figure 18. Two-wire Interface Timing Diagram IV (Qualified signal) VM SCL/SDArealtime (1) Delay SCL/SDAqualified Note 1: The delay is the Local Memory clock times DFFSR times 2 plus 1 Local Memory clock. EPIC Serial Interrupt Mode AC Timing Specifications Table ...
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Figure 19. EPIC Serial Interrupt Mode Output Timing Diagram VM sys_logic_clk3 S_CLK S_FRAME S_RST Figure 20. EPIC Serial Interrupt Mode Input Timing Diagram S_CLK S_INT IEEE 1149.1 (JTAG) AC Timing Specifications 2149A–HIREL–05/ ...
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PC8240 30 Table 17. JTAG AC Timing Specifications (Independent of PCI_SYNC_IN) (4) Num Characteristics 10 TMS, TDI Data Setup Time 11 TMS, TDI Data Hold Time 12 TCK to TDO Data Valid 13 TCK to TDO High Impedance Notes: 1. ...
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... TDO TDO Microcircuits are prepared for delivery in accordance with MIL-PRF-38535. Atmel offers a certificate of compliance with each shipment of parts, affirming the prod- ucts are in compliance either with MIL-STD-883 and guaranteeing the parameters not tested at temperature extremes for the entire temperature range. MOS devices must be handled with certain precautions to avoid damage due to accu- mulation of static charge ...
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Package Description Package Parameters PC8240 32 The PC8240 uses mm, cavity down, 352 pin Tape Ball Grid Array (TBGA) package. The package parameters are as provided in the following list. Table 18. Package Parameters Parameter ...
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Mechanical Dimensions Figure 25. PC8240 Package Dimensions and Pinout Assignments - F - CORNER ...
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PLL Configuration Table 19. PC8240 Microprocessor PLL Configuration PLL_ CFG CPU HID1 (1)(3) Ref [0 – – 00000 00110 1 00001 TBD 2 00010 TBD 3 00011 TBD 4 00100 00101 5 00101 TBD 7 00111 ...
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In Clock Off mode, no clocking occurs inside the PC8240 regardless of the PCI_SYNC_IN input. 6. Limited due to maximum memory VCO = 225 MHz. 7. Limited due to minimum CPU VCO = 200 MHz. 8. Limited due to ...
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Figure 27. Example Voltage Sequencing Circuits + 5V Source + 3.3V Source + 2.5V Source Power Supply Sizing Decoupling Recommendations Connection Recommendations PC8240 3.3V + 2.5V The power consumption numbers provided in Table do ...
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Pull-up/Pull-down Resistor Requirements 2149A–HIREL–05/02 The SDRAM_SYNC_OUT signal is intended to be routed halfway out to the SDRAM devices and then returned to the SDRAM_SYNC_IN input of the PC8240. The trace length may be used to skew or adjust the timing ...
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JTAG Configuration Signals PC8240 38 Boundary scan testing is enabled through the JTAG interface signals. (BSDL descrip www.mot.com/SPS/PowerPC/teksupport/tools/BSDL/) The TRST signal is optional in ...
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Figure 28. COP Connector Diagram From Target Board Sources (if only Key 13 No pin 15 16 COP Connector Physical Pin Out Notes: 1. QACK is an output ...
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... These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Atmel customers using or selling these products for use in such applications their own risk and agree to fully indemnify Atmel for any damages resulting from such improper use or sale. Validity ...
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... Ordering Information Type (PCX8240 if prototype) Temperature Range -40°C, +110°C Package TP: TBGA Note: 1. For availability of the different versions, contact your ATMEL sale office. 2149A–HIREL–05/02 Table 21. Differences with commercial part Commercial Part Temperature range 105°C Power consumption Spec 13a (output hold) ...
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... No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. ...