PCX8240VTPU200EZD3 Atmel, PCX8240VTPU200EZD3 Datasheet - Page 36

• Manufacturer Part Number: PCX8240VTPU200EZD3
• Description: IC MPU 32BIT 200MHZ 352TBGA
• Manufacturer: Atmel

Specifications of PCX8240VTPU200EZD3

• Processor Type: PowerPC 603e 32-Bit RISC
• Speed: 200MHz
• Voltage: 2.5V
• Mounting Type: Surface Mount
• Package / Case: 352-TBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Figure 27. Example Voltage Sequencing Circuits
Power Supply Sizing
Decoupling
Recommendations
Connection
Recommendations
36
PC8240
+ 5V
Source
+ 3.3V
Source
+ 2.5V
Source
The power consumption numbers provided in Table do not reflect power from the OV
and GVdd power supplies which are nonnegligible for the PC8240. In typical application
measurements, the OV
ranged from 300 to 900 mW. The ranges’ low end power numbers were results of the
PC8240 performing cache resident integer operations at the slowest frequency combi-
nation of 33:66:166 (PCI:Mem:CPU) MHz. The OVdd high end range’s value resulted
from the PC8240 performing continuous flushes of cache lines with alternating ones and
zeroes to PCI memory. The GVdd high end range’s value resulted from the PC8240
operating at the fastest frequency combination of 66:100:200 (PCI:Mem:CPU) MHz and
performing continuous flushes of cache lines with alternating ones and zeroes on 64-bit
boundaries to local memory.
Due to the PC8240’s dynamic power management feature, large address and data
buses, and high operating frequencies, the PC8240 can generate transient power
surges and high frequency noise in its power supply, especially while driving large
capacitive loads. This noise must be prevented from reaching other components in the
PC8240 system, and the PC8240 itself requires a clean, tightly regulated source of
power. Therefore, it is recommended that the system designer place at least one decou-
pling capacitor at each Vdd, OVdd, GVdd, and LVdd pin of the PC8240. It is also
recommended that these decoupling capacitors receive their power from separate Vdd,
OVdd, GVdd, and GND power planes in the PCB, utilizing short traces to minimize
inductance. These capacitors should have a value of 0.1 µF. Only ceramic SMT (surface
mount technology) capacitors should be used to minimize lead inductance, preferably
0508 or 0603, oriented such that connections are made along the length of the part.
In addition, it is recommended that there be several bulk storage capacitors distributed
around the PCB, feeding the Vdd, OVdd, GVdd, and LVdd planes, to enable quick
recharging of the smaller chip capacitors. These bulk capacitors should have a low ESR
(equivalent series resistance) rating to ensure the quick response time necessary. They
should also be connected to the power and ground planes through two vias to minimize
inductance. Suggested bulk capacitors
OSCON).
To ensure reliable operation, it is highly recommended to connect unused inputs to an
appropriate signal level. Unused active low inputs should be tied to OVdd. Unused
active high inputs should be connected to GND. All NC (no-connect) signals must
remain unconnected.
Power and ground connections must be made to all external Vdd, OVdd, GVdd, LVdd
and GND pins of the PC8240.
The PCI_SYNC_OUT signal is intended to be routed halfway out to the PCI devices and
then returned to the PCI_SYNC_IN input of the PC8240.
+ 5V
+ 3.3V
+ 2.5V
+ 3.3V
DD
power ranged from 200 to 600 mW and the GVdd power
MUR420
–
IN5820
100
–
330 µF (AVX TPS tantalum or Sanyo
IN5820
MUR420
+ 2.5V
2149A–HIREL–05/02
DD