PCX8240VTPU200EZD3 Atmel, PCX8240VTPU200EZD3 Datasheet - Page 6

• Manufacturer Part Number: PCX8240VTPU200EZD3
• Description: IC MPU 32BIT 200MHZ 352TBGA
• Manufacturer: Atmel

Specifications of PCX8240VTPU200EZD3

• Processor Type: PowerPC 603e 32-Bit RISC
• Speed: 200MHz
• Voltage: 2.5V
• Mounting Type: Surface Mount
• Package / Case: 352-TBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Table 1. PC8240 Pinout Listing (Continued)
Notes:
6
Signal Name
AVdd
AVdd2
Manufacturing Pins
DA2
DA[11
DA[14
–
–
1. Place pull-up resistors of 120 or less on the TEST[0 – 1] pins.
2. Treat these pins as No Connects unless using debug address functionality.
3. This pin has an internal pull-up resistor which is enabled only when the PC8240 is in the reset state. The value of the inter-
4. This pin is a reset configuration pin.
5. DL[0] is a reset configuration pin and has an internal pull-up resistor which is enabled only when the PC8240 is in the reset
6. Multi-pin signals such as AD[0 – 31] or DL[0 – 31] have their physical package pin numbers listed in order corresponding to
7. GNT4 is a reset configuration pin and has an internal pull-up resistor which is enabled only when the PC8240 is in the reset
8. Recommend a weak pull-up resistor (2 k – 10 k ) be placed on this PCI control pin to LVdd.
9. V
10. Recommend a weak pull-up resistor (2 k – 10 k ) be placed on this pin to OVdd.
11. Recommend a weak pull-up resistor (2 k – 10 k ) be placed on this pin to GVdd.
12. This pin has an internal pull-up resistor; the value of the internal pull-up resistor is not guaranteed, but is sufficient to prevent
13. Output Valid specifications for this pin are memory interface mode dependent (Registered or Flow-through), see Table 11,
14. Non-DRAM Access Output Valid specification applies to this pin during non-DRAM accesses, see specification 12b3 in
15. This pin is affected by programmable PCI_HOLD_DEL parameter, see “PCI Signal Output Hold Timing” on page 23.
16. This pin is an open drain signal.
17. This pin can be programmed to be driven (default) or can be programmed to be open drain; see PMCR2 register description
18. This pin is a Sustained Tri-State pin as defined by the PCI Local Bus Specification.
13]
15]
PC8240
nal pull-up resistor is not guaranteed, but is sufficient to ensure that a "1" is read into configuration bits during reset.
state. The value of the internal pull-up resistor is not guaranteed, but is sufficient to insure that a "1" is read into configuration
bits during reset.
the signal names. Ex: AD0 is on pin C22, AD1 is on pin D22,... AD31 is on pin V25.
state. The value of the internal pull-up resistor is not guaranteed, but is sufficient to insure that a "1" is read into configuration
bits during reset.
page 16.
unused inputs from floating.
“Output AC Timing Specifications,” on page 22.
Table 11, “Output AC Timing Specifications,” on page 22.
in the Motorola PC8240 User’s Manual for details.
IH
and V
IL
for these signals are the same as the PCI V
Package Pin Number
C17
AF24
C25
AD26 AF17 AF19
F1 J2
Core Logic)
Logic) 2.5V
(Peripheral
PLL (CPU
Power for
Power for
Pin Type
IH
2.5V
PLL
I/O
I/O
I/O
and V
IL
entries in Table 6, “DC Electrical Specifications,” on
Supply
Power
AVdd2
OVdd
OVdd
GVdd
AVdd
DRV_MEM_ADDR
Output Driver
DRV_PCI
DRV_PCI
Type
–
–
2149A–HIREL–05/02
Notes
(2)(6)
(2)(6)
(2)
–
–