MC68MH360EM33L Freescale Semiconductor, MC68MH360EM33L Datasheet - Page 738

• Manufacturer Part Number: MC68MH360EM33L
• Description: IC MPU QUICC ETHER 33MHZ 240FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360EM33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Freescale Semiconductor, Inc.
Applications
Step 20: Enable External Bus Masters
The final step in the initialization is to allow external bus masters (if any) to obtain ownership
of the system bus. Some of the characteristics of the QUICC bus arbitration logic were cho-
sen in the MCR of the SIM60. The user should review these settings before continuing with
this step. Also, if an external bus master uses QUICC resources such as chip selects, the
settings of the GMR, BRs, and ORs in the memory controller should be reviewed before con-
tinuing.
Step 21: Off to the Races
The user has now successfully examined all major features of the QUICC and can embark
on a quick and successful product development cycle using the QUICC. For applications
desiring to port code from the MC68302, see 9.3 Porting MC68302 IMP Code to the
MC68360 QUICC in this manual.
9.3 PORTING MC68302 IMP CODE TO THE MC68360 QUICC
This subsection is designed as a guide for software engineers who desire to port software
written for the MC68302 integrated multiprotocol processor (IMP) to the MC68360 QUICC.
It discusses the MC68302 on a register-by-register basis and explains programming the
same functions on the QUICC.
Although the QUICC contains a number of new features beyond the capabilities of the
MC68302, the basic architectural approach is the same. Although it will be necessary to
modify the MC68302 initialization code and, in some cases, the register and bit names, a
great effort was made to preserve the basic code flow. An example would be the basic flow
of an interrupt handler or an error handler. Thus, the knowledge that was obtained during
the development of the MC68302 drivers need not be lost during the port to the QUICC.
9.3.1 CPU and Compilers
The QUICC contains a CPU32+ processor. This processor executes the M68000 code that
was written on the MC68302; however, if such code was accessing MC68302 peripherals,
it will require some modification.
Most M68000 compiler vendors also provide a CPU32 compiler. If the application code is
recompiled using a CPU32 compiler, then an additional performance improvement will also
be obtained due to the availability of additional CPU32 instructions over and above those of
the M68000.
Also, using the QUICC 32-bit data bus mode provides even further performance improve-
ment. This is especially true if the original M68000 code used 32-bit pointers and data fields.
The best performance improvement will occur when the objects are long-word aligned.
9.3.2 Differences/Similarities
The 4-Kbyte RAM and peripheral area on the MC68302 is expanded to 8 Kbytes on the
QUICC. Since the QUICC is an IMB device, the initialization of the system integration mod-
ule (SIM60) is actually more similar to another IMB-based device, such as the MC68340,
9-18
MC68360 USER’S MANUAL
MOTOROLA
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