MC68020RC20E Freescale Semiconductor, MC68020RC20E Datasheet - Page 219

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MC68020RC20E

Manufacturer Part Number
MC68020RC20E
Description
IC MICROPROCESSOR 32BIT 114-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68020RC20E

Processor Type
M680x0 32-Bit
Speed
20MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
114-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
114
Package Type
PGA
Lead Free Status / RoHS Status
Contains lead / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68020RC20E
Manufacturer:
FREESCALE
Quantity:
1 831
Part Number:
MC68020RC20E
Manufacturer:
CONVERT
Quantity:
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Part Number:
MC68020RC20E
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
For the first three clocks of this example, the bus controller and sequencer are both
performing tasks associated with the MOVE #1 instruction. The next three clocks (clocks
4, 5, and 6) demonstrate instruction overlap. The bus controller is performing a write to
memory as part of the MOVE #1 instruction. The sequencer, on the other hand, is
performing the ADD #2 instruction for two clocks (clocks 4 and 5) and beginning source
effective address (EA) calculations for the MOVE #3 instruction. The bus controller activity
completely overlaps the execution of the ADD #2 instruction, causing the ADD #2
attributed execution time to be zero clocks. The overlap also shortens the effective
execution time of the MOVE #3 instruction by one clock because the bus controller
completes the MOVE #1 write operation while the sequencer begins the MOVE #3 EA
calculation.
The sequencer continues the source EA calculation for one more clock period (clock 7)
while the bus controller begins a read for MOVE #3. When counting instruction execution
time in bus clocks, the MOVE #1 completes at the end of clock 6, and the execution of
MOVE #3 begins on clock 7.
Both the sequencer and bus controller continue with MOVE #3 until the end of clock 14,
when the sequencer begins to perform ADD #4. Timing for MOVE #3 continues because
the bus controller is still performing the write to the destination of MOVE #3. The bus
activity for MOVE #3 completes at the end of clock 15. The effective execution time for
MOVE #3 is nine clocks.
The one clock cycle (clock 15) when the sequencer is performing ADD #4 and the bus
controller is writing to the destination of MOVE #3 is absorbed by the execution time of
MOVE #3. This overlap shortens the effective execution time of ADD #4 by one clock,
giving it an attributed execution time of one clock.
MOTOROLA
EXECUTION TIME
INSTRUCTION
CONTROLLER
SEQUENCER
ACTIVITY
CLOCK
COUNT
CLOCK
BUS
BUS
LEGEND:
1
PERFORM
MOVE #1
BYTES n + 8
PREFETCH
PREFETCH
2
1) MOVE.L D4,(A1)+
2) ADD.L D4,D5
3) MOVE.L (A1),–(A2)
4) ADD.L D5,D6
Figure 8-3. Processor Activity for Example 1
MOVE.L D4,(A1)+
3
Freescale Semiconductor, Inc.
IDLE
For More Information On This Product,
(6)
4
PERFORM
WRITE TO (A1)+
ADD #2
WRITE
5
Go to: www.freescale.com
M68020 USER’S MANUAL
6
CALCULATE
SOURCE EA
MOVE #3
7
READ FROM (A1)
DESTINATION
8
READ
CALCULATE
MOVE #3
EA
9
10
MOVE.L (A1),–(A2)
BYTES n + 12
PREFETCH
PREFETCH
11
IDLE
(9)
12
13
PERFORM
MOVE #3
WRITE TO –(A2)
WRITE
14
15
PERFORM
ADD #4
16
ADD.L
D5,D6
IDLE
(1)
17
8- 5

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