MC68020RC20E Freescale Semiconductor, MC68020RC20E Datasheet - Page 227

• Manufacturer Part Number: MC68020RC20E
• Description: IC MICROPROCESSOR 32BIT 114-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68020RC20E

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 114-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 114
• Package Type: PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

8.2.1 Fetch Effective Address
The fetch effective address table indicates the number of clock periods needed for the
processor to calculate and fetch the specified effective address. The total number of clock
cycles is outside the parentheses; the number of read, prefetch, and write cycles is given
inside the parentheses as (r/p/w). These cycles are included in the total clock cycle
number.
B = Base address; 0, An, PC, Xn, An + Xn. Form does not affect timing.
I
NOTE: Xn cannot be in B and I at the same time. Scaling and size of Xn do not affect timing.
MOTOROLA
Dn
An
(An)
(An)+
–(An)
(d
(xxx).W
(xxx).L
#<data >.B
#<data >.W
#<data >.L
(d 8 ,An,Xn) or (d 8 ,PC,Xn)
(d
(B)
(d
(d
([B],I)
([B],I,d
([B],I,d
([d
([d
([d
([d
([d
([d
16
16
16
32
16
16
16
32
32
32
= Index; 0, Xn
,An) of (d
,An,Xn) or (d
,B)
,B)
,B],I)
,B],I,d
,B],I,d
,B],I)
,B],I,d
,B],I,d
16
32
)
)
16
32
16
32
)
)
)
)
16
,PC)
16
,PC,Xn)
Address Mode
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
M68020 USER’S MANUAL
Best Case
10(1/0/0)
11(2/0/0)
11(2/0/0)
11(2/0/0)
13(2/0/0)
13(2/0/0)
15(2/0/0)
17(2/0/0)
17(2/0/0)
0(0/0/0)
0(0/0/0)
3(1/0/0)
4(1/0/0)
3(1/0/0)
3(1/0/0)
3(1/0/0)
3(1/0/0)
0(0/0/0)
0(0/0/0)
0(0/0/0)
4(1/0/0)
4(1/0/0)
4(1/0/0)
6(1/0/0)
9(2/0/0)
Cache Case
13(1/0/0)
12(2/0/0)
14(2/0/0)
14(2/0/0)
14(2/0/0)
16(2/0/0)
16(2/0/0)
18(2/0/0)
20(2/0/0)
20(2/0/0)
0(0/0/0)
0(0/0/0)
4(1/0/0)
4(1/0/0)
5(1/0/0)
5(1/0/0)
4(1/0/0)
4(1/0/0)
2(0/0/0)
2(0/0/0)
4(0/0/0)
7(1/0/0)
7(1/0/0)
7(1/0/0)
9(1/0/0)
Worst Case
12(1/1/0)
16(1/2/0)
13(2/1/0)
16(2/1/0)
17(2/2/0)
16(2/1/0)
19(2/2/0)
20(2/2/0)
20(2/2/0)
22(2/2/0)
24(2/3/0)
0(0/0/0)
0(0/0/0)
4(1/0/0)
4(1/0/0)
5(1/0/0)
6(1/1/0)
6(1/1/0)
7(1/1/0)
3(0/1/0)
3(0/1/0)
5(0/1/0)
8(1/1/0)
9(1/1/0)
9(1/1/0)
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