CS4270-DZZ Cirrus Logic Inc, CS4270-DZZ Datasheet - Page 23

• Manufacturer Part Number: CS4270-DZZ
• Description: IC CODEC 24BIT 105DB 24TSSOP
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audior

Specifications of CS4270-DZZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 105
• Voltage - Supply, Analog: 3.1 V ~ 5.25 V
• Voltage - Supply, Digital: 3.1 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Audio Codec Type: Stereo
• No. Of Adcs: 1
• No. Of Dacs: 1
• No. Of Input Channels: 3
• No. Of Output Channels: 3
• Adc / Dac Resolution: 24bit
• Sampling Rate: 216kSPS
• Ic Interface Type: I2C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1002 - BOARD EVAL FOR CS4270 CODEC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1622

DS686PP1
5.1.4 Clock Ratio Selection
5.1.5
5.1.6 High-Pass Filter
Interpolation Filter
Depending on whether the CS4270 is in Master or Slave Mode, different MCLK/LRCK and SCLK/LRCK
ratios may be used. These ratios are shown in the
In Stand-Alone Mode, the fast roll-off interpolation filter is used. Filter specifications can be found in
tion
The operational amplifiers in the input circuitry driving the CS4270 may generate a small DC offset into
the ADC. The CS4270 includes a high-pass filter after the decimator to remove any DC offset which could
result in recording a DC level, possibly yielding "clicks" when switching between devices in a multichannel
system. In Stand-Alone Mode, the high-pass filter continuously subtracts a measure of the DC offset from
the output of the decimation filter This function cannot be disabled in Stand-Alone Mode.
Single-Speed
Double-Speed
Quad-Speed
Single-Speed
Double-Speed
Quad-Speed
4. Plots of the data are contained in
MCLK/LRCK
MCLK/LRCK
Table 2. Clock Ratios - Stand-Alone Mode
1024
1024
256
384
512
128
192
256
512
128
256
256
384
512
128
192
256
512
128
256
64
96
64
96
Master Mode
Section 9. “Filter Plots” on page
Slave Mode
32, 48, 64, 128
32, 48, 64, 128
32, 48, 64, 96
32, 48, 64, 96
SCLK/LRCK
SCLK/LRCK
32, 48, 64
32, 48, 64
32, 48, 64
32, 48, 64
32, 48, 64
32, 48, 64
32, 48, 64
32, 48, 64
64
64
64
64
64
64
64
64
64
64
64
64
Table
2.
LRCK
LRCK
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
MDIV2
MDIV2
41.
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
MDIV1
MDIV1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
CS4270
Sec-
23