SAF82532N10V32A Infineon Technologies, SAF82532N10V32A Datasheet - Page 120

• Manufacturer Part Number: SAF82532N10V32A
• Description: IC CONTROLLER 2-CH SER 68-PLCC
• Manufacturer: Infineon Technologies

Specifications of SAF82532N10V32A

• Controller Type: Serial Communications Controller (SCC)
• Interface: Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 8mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Other names: SAF82532N10V32A; SAF82532N10V32AIN

Semiconductor Group
Receive Status Register (RSTA)
Access: read
Note: The contents of the RSTA register relates to the last received HDLC frame and is
VFR …
RDO …
RSTA
updated when end-of-frame is recognized at the serial receive interface.
Additionally, RSTA byte is copied into RFIFO (last byte of each stored frame).
Thus, after RME interrupt instead of the contents of RSTA register the RSTA byte
stored in the RFIFO as the last byte of each frame should be evaluated.
VFR
7
Valid Frame
Determines whether a valid frame has been received.
1 … valid
0 … invalid.
An invalid frame is either
• a frame which is not an integer number of 8 bits (n
• a frame which is too short taking into account the operation
Note: Shorter frames are not reported.
Receive Data Overflow
A data overflow has occurred during reception of the frame.
Additionally,
ISR1:RDO / IMR1:RDO).
length (e.g. 25 bits), or
mode selected via MODE (MDS1, MDS0, ADM) and the
selected CRC algorithm (CCR2:C32) and the selection of
receive CRC ON/OFF (CCR3:RCRC) as follows:
– auto-/non-auto mode (16-bit address), RCRC = 0 :
– auto-/non-auto mode (16-bit address), RCRC = 1 :
– auto-/non-auto mode (8-bit address), RCRC = 0 :
– auto-/non-auto-mode (8-bit address), RCRC = 1 :
– transparent mode 1: 3 bytes (CRC-CCITT) or 5 (CRC-32)
– transparent mode 0: 2 bytes (CRC-CCITT) or 4 (CRC-32)
4 bytes (CRC-CCITT) or 6 (CRC-32)
3-4 bytes (CRC-CCITT) or 3-6 (CRC-32)
3 bytes (CRC-CCITT) or 5 (CRC-32)
2-3 bytes (CRC-CCITT) or 2-5 (CRC-32)
RDO
address: ch-A: 21
CRC
an
ch-B: 61
120
interrupt
RAB
H
H
can
HA1
Detailed Register Description
be
SAB 82532/SAF 82532
HA0
generated
C/R
HDLC Mode
(refer
8 bits) in
LA
07.96
0
to