SAF82532N10V32A Infineon Technologies, SAF82532N10V32A Datasheet - Page 121

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SAF82532N10V32A

Manufacturer Part Number
SAF82532N10V32A
Description
IC CONTROLLER 2-CH SER 68-PLCC
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAF82532N10V32A

Controller Type
Serial Communications Controller (SCC)
Interface
Serial
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
8mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
SAF82532N10V32A
SAF82532N10V32AIN

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Part Number
Manufacturer
Quantity
Price
Part Number:
SAF82532N10V32A
Manufacturer:
Infineon Technologies
Quantity:
10 000
CRC …
RAB …
HA1 … HA0 …
C/R …
LA …
Semiconductor Group
CRC Compare/Check
0 … CRC check failed; received frame contains errors.
1 … CRC check o.k.; received frame is error-free.
Receive Message Aborted
The received frame was aborted from the transmitting station.
According to the HDLC protocol, this frame must be discarded by
the receiver station.
High Byte Address Compare
Significant only if 2-byte address mode has been selected.
In operating modes which provide high byte address recognition,
the ESCC2 compares the high byte of a 2-byte address with the
contents of two individually programmable registers (RAH1,
RAH2) and the fixed values FE
Dependent on the result of this comparison, the following bit
combinations are possible:
10 … RAH1 has been recognized
00 … RAH2 has been recognized
01 … broadcast address has been recognized
Note: If RAH1, RAH2 contain identical values, a match is
Command/Response
Significant only if 2-byte address mode has been selected.
Value of the C/R bit (bit in high address byte) in the received
frame. The interpretation depends on the setting of the CRI bit in
the RAH1 register. Refer also to the description of RAH1 register.
Low Byte Address Compare
Not significant in transparent and extended transparent operating
modes.
The low byte address of a 2-byte address field, or the single
address byte of a 1-byte address field is compared with two
registers (RAL1, RAL2).
0 … RAL2 has been recognized.
1 … RAL1 has been recognized.
According to the X.25 LAPB protocol, RAL1 is interpreted as the
address of a COMMAND frame and RAL2 is interpreted as the
address of a RESPONSE frame.
indicated by ‘10’.
121
H
and FC
Detailed Register Description
SAB 82532/SAF 82532
H
(broadcast address).
HDLC Mode
07.96

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