SAF82532N10V32A Infineon Technologies, SAF82532N10V32A Datasheet - Page 173

• Manufacturer Part Number: SAF82532N10V32A
• Description: IC CONTROLLER 2-CH SER 68-PLCC
• Manufacturer: Infineon Technologies

Specifications of SAF82532N10V32A

• Controller Type: Serial Communications Controller (SCC)
• Interface: Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 8mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Other names: SAF82532N10V32A; SAF82532N10V32AIN

Termination Character Register (TCR)
Access: read/write
Value after RESET: 00
TCR7 … TCR0 …
Data Format (DAFO)
Access: read/write
Value after RESET: 00
Note: Unused bits have to be set to logical ‘0’.
XBRK …
Semiconductor Group
DAFO
TCR
TCR7
7
7
0
Termination Character
If enabled via register RFC the received data stream is monitored
for the occurrence of a programmed ‘termination character’. When
such a character is found, an interrupt is issued if enabled via
mask register IMR0. The number of valid bytes in the RFIFO up
to and including the termination character is determined by
reading the RBCL register.
Note: If selected character length is less than eight bits, leading
Transmit Break
0 … Normal operation for data transmission.
1 … This command forces the TxD pin to go ‘low’, regardless of
H
H
any data being transmitted at this time. This command is
executed immediately (with the next rising edge of Transmit
Clock) and the transmitter is disabled. The current character
is lost. However, the contents of XFIFO are still available and
are sent out as soon as this bit is reset. To avoid this, the
Transmit Reset command XRES should be issued. If XBRK
is still set when XRES is issued, the Break signal on TxD
stays active.
XBRK
(unused) bits of TCR have to be set to ‘0’.
address: ch-A: 26
address: ch-A: 27
STOP
ch-B: 66
ch-B: 67
173
PAR1
H
H
H
H
PAR0
Detailed Register Description
SAB 82532/SAF 82532
PARE
CHL1
ASYNC Mode
TCR0
CHL0
07.96
0
0