PIC18F4550-I/P Microchip Technology Inc., PIC18F4550-I/P Datasheet - Page 123

• Manufacturer Part Number: PIC18F4550-I/P
• Description: 40 PIN, 32 KB FLASH, 2048 RAM, FS-USB 2.0
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4550-I/P

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 12 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 34
• Interface: I2C/SPI/UART/USART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

TABLE 10-7:
© 2006 Microchip Technology Inc.
RD0/SPP0
RD1/SPP1
RD2/SPP2
RD3/SPP3
RD4/SPP4
RD5/SPP5/P1B
RD6/SPP6/P1C
RD7/SPP7/P1D
Legend:
Note 1:
Pin
OUT = Output, IN = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input
May be configured for tri-state during Enhanced PWM shutdown events.
Function
PORTD I/O SUMMARY
SPP0
SPP1
SPP2
SPP3
SPP4
SPP5
SPP6
SPP7
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7
P1B
P1C
P1D
Setting
TRIS
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
0
1
1
1
0
0
1
1
1
0
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
I/O
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
PIC18F2455/2550/4455/4550
I/O Type
Preliminary
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
DIG
TTL
DIG
DIG
DIG
TTL
DIG
ST
ST
ST
ST
ST
ST
ST
ST
LATD<0> data output.
PORTD<0> data input.
SPP<0> output data; takes priority over port data.
SPP<0> input data.
LATD<1> data output.
PORTD<1> data input.
SPP<1> output data; takes priority over port data.
SPP<1> input data.
LATD<2> data output.
PORTD<2> data input.
SPP<2> output data; takes priority over port data.
SPP<2> input data.
LATD<3> data output.
PORTD<3> data input.
SPP<3> output data; takes priority over port data.
SPP<3> input data.
LATD<4> data output.
PORTD<4> data input.
SPP<4> output data; takes priority over port data.
SPP<4> input data.
LATD<5> data output
PORTD<5> data input
SPP<5> output data; takes priority over port data.
SPP<5> input data.
ECCP1 Enhanced PWM output, channel B; takes priority over
port and SPP data.
LATD<6> data output.
PORTD<6> data input.
SPP<6> output data; takes priority over port data.
SPP<6> input data.
ECCP1 Enhanced PWM output, channel C; takes priority over
port and SPP data.
LATD<7> data output.
PORTD<7> data input.
SPP<7> output data; takes priority over port data.
SPP<7> input data.
ECCP1 Enhanced PWM output, channel D; takes priority over
port and SPP data.
(1)
(1)
(1)
Description
DS39632C-page 121