PIC18F4550-I/P Microchip Technology Inc., PIC18F4550-I/P Datasheet - Page 23

• Manufacturer Part Number: PIC18F4550-I/P
• Description: 40 PIN, 32 KB FLASH, 2048 RAM, FS-USB 2.0
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4550-I/P

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 12 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 34
• Interface: I2C/SPI/UART/USART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

TABLE 1-3:
© 2006 Microchip Technology Inc.
RE0/AN5/CK1SPP
RE1/AN6/CK2SPP
RE2/AN7/OESPP
RE3
V
V
V
NC/ICCK/ICPGC
NC/ICDT/ICPGD
NC/ICRST/ICV
NC/ICPORTS
NC
Legend: TTL = TTL compatible input
Note 1:
USB
SS
DD
RE0
AN5
CK1SPP
RE1
AN6
CK2SPP
RE2
AN7
OESPP
ICCK
ICPGC
ICDT
ICPGD
ICRST
ICV
ICPORTS
2:
3:
Pin Name
PP
ST = Schmitt Trigger input with CMOS levels
O
Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared.
Default assignment for CCP2 when CCP2MX Configuration bit is set.
These pins are No Connect unless the ICPRT Configuration bit is set. For NC/ICPORTS, the pin is No
Connect unless ICPRT is set and the DEBUG Configuration bit is cleared.
(3)
PP (3)
= Output
(3)
(3)
PIC18F4455/4550 PINOUT I/O DESCRIPTIONS (CONTINUED)
12, 31 6, 30,
11, 32 7, 8,
PDIP QFN TQFP
10
—
18
—
—
—
—
—
8
9
Pin Number
28, 29
25
26
27
31
37
13
—
—
—
—
—
6, 29
7, 28
25
26
27
—
37
12
13
33
34
—
PIC18F2455/2550/4455/4550
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
—
O
O
O
P
P
O
P
P
I
I
I
I
Preliminary
Analog
Analog
Analog
Buffer
Type
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
—
—
—
—
—
—
CMOS = CMOS compatible input or output
I
P
PORTE is a bidirectional I/O port.
See MCLR/V
Ground reference for logic and I/O pins.
Positive supply for logic and I/O pins.
Internal USB 3.3V voltage regulator output.
No Connect or dedicated ICD/ICSP™ port clock.
No Connect or dedicated ICD/ICSP port clock.
No Connect or dedicated ICD/ICSP port Reset.
No Connect or 28-pin device emulation.
No Connect.
Digital I/O.
Analog input 5.
SPP clock 1 output.
Digital I/O.
Analog input 6.
SPP clock 2 output.
Digital I/O.
Analog input 7.
SPP output enable output.
In-Circuit Debugger clock.
ICSP programming clock.
In-Circuit Debugger data.
ICSP programming data.
Master Clear (Reset) input.
Programming voltage input.
Enable 28-pin device emulation when connected
to V
= Input
= Power
SS
.
PP
/RE3 pin.
Description
DS39632C-page 21