PIC18F4550-I/P Microchip Technology Inc., PIC18F4550-I/P Datasheet - Page 183

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PIC18F4550-I/P

Manufacturer Part Number
PIC18F4550-I/P
Description
40 PIN, 32 KB FLASH, 2048 RAM, FS-USB 2.0
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F4550-I/P

A/d Inputs
13-Channel, 10-Bit
Comparators
2
Cpu Speed
12 MIPS
Eeprom Memory
256 Bytes
Input Output
34
Interface
I2C/SPI/UART/USART/USB
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Speed
48 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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17.5.3
The USB Error Interrupt Status register (Register 17-9)
contains the flag bits for each of the error sources
within the USB peripheral. Each of these sources is
controlled by a corresponding interrupt enable bit in
the UEIE register. All of the USB error flags are ORed
together to generate the USB Error Interrupt Flag
(UERRIF) at the top level of the interrupt logic.
REGISTER 17-9:
© 2006 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
BTSEF
R/C-0
USB ERROR INTERRUPT STATUS
REGISTER (UEIR)
BTSEF: Bit Stuff Error Flag bit
1 = A bit stuff error has been detected
0 = No bit stuff error
Unimplemented: Read as ‘0’
BTOEF: Bus Turnaround Time-out Error Flag bit
1 = Bus turnaround time-out has occurred (more than 16 bit times of Idle from previous EOP elapsed)
0 = No bus turnaround time-out
DFN8EF: Data Field Size Error Flag bit
1 = The data field was not an integral number of bytes
0 = The data field was an integral number of bytes
CRC16EF: CRC16 Failure Flag bit
1 = The CRC16 failed
0 = The CRC16 passed
CRC5EF: CRC5 Host Error Flag bit
1 = The token packet was rejected due to a CRC5 error
0 = The token packet was accepted
PIDEF: PID Check Failure Flag bit
1 = PID check failed
0 = PID check passed
U-0
UEIR: USB ERROR INTERRUPT STATUS REGISTER
C = Clearable bit
‘1’ = Bit is set
U-0
PIC18F2455/2550/4455/4550
BTOEF
R/C-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
DFN8EF
R/C-0
Each error bit is set as soon as the error condition is
detected. Thus, the interrupt will typically not
correspond with the end of a token being processed.
Once an interrupt bit has been set by the SIE, it must
be cleared by software by writing a ‘0’.
CRC16EF
R/C-0
x = Bit is unknown
CRC5EF
R/C-0
DS39632C-page 181
PIDEF
R/C-0
bit 0

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