PIC18F4550-I/P Microchip Technology Inc., PIC18F4550-I/P Datasheet - Page 147

• Manufacturer Part Number: PIC18F4550-I/P
• Description: 40 PIN, 32 KB FLASH, 2048 RAM, FS-USB 2.0
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4550-I/P

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 12 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 34
• Interface: I2C/SPI/UART/USART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

TABLE 15-3:
© 2006 Microchip Technology Inc.
INTCON
RCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
TRISB
TRISC
TMR1L
TMR1H
T1CON
TMR3H
TMR3L
T3CON
CCPR1L
CCPR1H
CCP1CON
CCPR2L
CCPR2H
CCP2CON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by Capture/Compare, Timer1 or Timer3.
Note 1:
Name
2:
The SBOREN bit is only available when BOREN<1:0> = 01; otherwise, the bit reads as ‘0’.
These bits are unimplemented on 28-pin devices; always maintain these bits clear.
Timer1 Register Low Byte
Timer1 Register High Byte
Timer3 Register High Byte
Timer3 Register Low Byte
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
Capture/Compare/PWM Register 2 Low Byte
Capture/Compare/PWM Register 2 High Byte
GIE/GIEH PEIE/GIEL
SPPIF
SPPIE
SPPIP
OSCFIF
OSCFIE
OSCFIP
TRISB7
TRISC7
P1M1
RD16
RD16
IPEN
Bit 7
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1 AND TIMER3
—
(2)
(2)
(2)
(2)
SBOREN
T3CCP2
P1M0
TRISB6
TRISC6
T1RUN
CMIF
CMIE
CMIP
ADIF
ADIE
ADIP
Bit 6
—
(2)
(1)
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
T3CKPS1 T3CKPS0 T3CCP1
TMR0IE
TRISB5
DC1B1
DC2B1
USBIF
USBIE
USBIP
RCIF
RCIE
RCIP
Bit 5
—
—
PIC18F2455/2550/4455/4550
Preliminary
TRISB4
DC1B0
DC2B0
INT0IE
EEIE
EEIP
Bit 4
TXIF
TXIE
TXIP
EEIF
RI
—
CCP1M3
CCP2M3
TRISB3
SSPIF
SSPIE
SSPIP
BCLIF
BCLIE
BCLIP
RBIE
Bit 3
TO
—
CCP1M2 CCP1M1 CCP1M0
CCP2M2 CCP2M1 CCP2M0
T3SYNC
TMR0IF
CCP1IE
CCP1IP
CCP1IF
HLVDIF
HLVDIE
HLVDIP
TRISB2
TRISC2
Bit 2
PD
TMR1CS TMR1ON
TMR3CS TMR3ON
TMR2IF
TMR2IE
TMR2IP
TMR3IF
TMR3IE
TMR3IP
TRISB1
TRISC1
INT0IF
Bit 1
POR
TMR1IE
TMR1IP
TMR1IF
CCP2IF
CCP2IE
CCP2IP
TRISC0
TRISB0
DS39632C-page 145
RBIF
Bit 0
BOR
on page
Values
Reset
51
52
54
54
54
54
54
54
54
54
52
52
52
53
53
53
53
53
53
53
53
53