PEF82912FV14XP Lantiq, PEF82912FV14XP Datasheet - Page 202
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PEF82912FV14XP
Manufacturer Part Number
PEF82912FV14XP
Description
Manufacturer
Lantiq
Datasheet
1.PEF82912FV14XP.pdf
(240 pages)
Specifications of PEF82912FV14XP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
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UCIR
Reset Value:
4.11.12
The U-transceiver C/I code Write register allows a microcontroller to control the state of
the U-transceiver. To enable this function bit UCI in register OPMODE must be set to ‘1’
before.
UCIW
Reset Value:
4.11.13
The Test register sets the U-transceiver in the desired test mode.
TEST
Reset Value:
CCRC
+-1 tones Send +/-1 Pulses Instead of +/-3
Data Sheet
7
0
7
0
7
0
UCIW - C/I Code Write Register
TEST - Test Register
Send Corrupt CRC
0 =
1 =
0 =
00
01
00
6
0
6
0
6
0
inactive
send corrupt (inverted) CRCs
issues +/-3 pulses during 40 kHz tone generation or in SSP mode
H
H
H
5
0
5
0
5
0
4
0
4
0
4
0
read
write
read*
188
)
/write
CCRC
3
3
3
tones
C/I code output
C/I code input
+-1
2
2
2
Register Description
PEF 82912/82913
Address:
Address:
Address:
1
1
1
0
2001-03-30
40kHz
0
0
0
6D
6E
6F
H
H
H
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