PEF82912FV14XP Lantiq, PEF82912FV14XP Datasheet - Page 90

• Manufacturer Part Number: PEF82912FV14XP
• Manufacturer: Lantiq

Specifications of PEF82912FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

•
Figure 40
Figure 41
to the µC and when it is reported to the state machine:
• towards the µC reports are always sent after one complete U-superframe was
• whereas towards the state machine M4-bit changes (ACT, DEA, UOA, SAI) are
•
Figure 41
Data Sheet
received,
instantly passed on as soon as they were approved. In context of
means that a verified ACT bit change is already reported at the end of basic frame #1
instead of the end of basic frame #8.
illustrates the point of time when a detected M4, M5, M6 bit change is reported
ISW
1. Basic Frame
Maintenance Channel Filtering Options
M4 Bit Report Timing (Statemachine vs. µC)
M5, M6
2B+D
M4= ACT
M4
reported to
M1-6
validated
e.g. ACT
Machine
State
bit
SW
2. Basic Frame
2B+D
n. Super Frame
Change
Change
CRC
CRC
TLL
TLL
On
On
M1-6
76
&
&
MFILT.EOC(Bit3,2,1)
SW
MFILT.M4(Bit4,3)
8. Basic Frame
M
U
M
U
X
X
2B+D
MFILT.M4(Bit5)
M
U
X
MFILT.M56(Bit6)
M1-6
M
U
X
INT
ISW
n+1. Super Frame
State
Machine
Functional Description
M4 INT
M56 INT
2B+D
PEF 82912/82913
m456_filter_QSMINT.emf
m4tim2sm_QSMINT.emf
M1-6
Figure 41
Time
2001-03-30
this