DSPIC33FJ32MC204-I/PT Microchip Technology Inc., DSPIC33FJ32MC204-I/PT Datasheet - Page 166

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DSPIC33FJ32MC204-I/PT

Manufacturer Part Number
DSPIC33FJ32MC204-I/PT
Description
16-BIT DSC, 44LD, 32KB FLASH, MOTOR, 40 MIPS, NANOWATT
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet

Specifications of DSPIC33FJ32MC204-I/PT

A/d Inputs
9-Channels, 10-Bit
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
35
Interface
I2C, SPI, UART/USART
Ios
35
Memory Type
Flash
Number Of Bits
16
Package Type
44-pin TQFP
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
3-3.6 V
Dc
08+
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ32MC204-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC33FJ32MC204-I/PT
0
REGISTER 14-9:
DS70283B-page 164
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13-8
bit 7
bit 6-3
bit 2
bit 1
bit 0
Note 1:
FLTAM
R/W-0
U-0
PWM2 supports only 1 PWM I/O pin pair.
Unimplemented: Read as ‘0’
FAOVxH<3:1>:FAOVxL<3:1>: Fault Input A PWM Override Value bits
1 = The PWM output pin is driven active on an external Fault input event
0 = The PWM output pin is driven inactive on an external Fault input event
FLTAM: Fault A Mode bit
1 = The Fault A input pin functions in the Cycle-by-Cycle mode
0 = The Fault A input pin latches all control pins to the programmed states in PxFLTACON<13:8>
Unimplemented: Read as ‘0’
FAEN3: Fault Input A Enable bit
1 = PWMxH3/PWMxL3 pin pair is controlled by Fault Input A
0 = PWMxH3/PWMxL3 pin pair is not controlled by Fault Input A
FAEN2: Fault Input A Enable bit
1 = PWMxH2/PWMxL2 pin pair is controlled by Fault Input A
0 = PWMxH2/PWMxL2 pin pair is not controlled by Fault Input A
FAEN1: Fault Input A Enable bit
1 = PWMxH1/PWMxL1 pin pair is controlled by Fault Input A
0 = PWMxH1/PWMxL1 pin pair is not controlled by Fault Input A
U-0
U-0
P
x
FLTACON: FAULT A CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
FAOV3H
R/W-0
U-0
FAOV3L
R/W-0
U-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
FAOV2H
R/W-0
U-0
(1)
FAOV2L
FAEN3
R/W-0
R/W-0
© 2007 Microchip Technology Inc.
x = Bit is unknown
FAOV1H
FAEN2
R/W-0
R/W-0
FAOV1L
FAEN1
R/W-0
R/W-0
bit 8
bit 0

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