DSPIC33FJ32MC204-I/PT Microchip Technology Inc., DSPIC33FJ32MC204-I/PT Datasheet - Page 53

• Manufacturer Part Number: DSPIC33FJ32MC204-I/PT
• Description: 16-BIT DSC, 44LD, 32KB FLASH, MOTOR, 40 MIPS, NANOWATT
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC33FJ32MC204-I/PT

• A/d Inputs: 9-Channels, 10-Bit
• Cpu Speed: 40 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 35
• Interface: I2C, SPI, UART/USART
• Ios: 35
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 44-pin TQFP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Timers: 3-16-bit, 1-32-bit
• Voltage, Range: 3-3.6 V
• Dc: 08+
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

4.0
The
dsPIC33FJ16MC304 devices contain internal Flash
program memory for storing and executing application
code. The memory is readable, writable and erasable
during normal operation over the entire V
Flash memory can be programmed in two ways:
• In-Circuit Serial Programming™ (ICSP™)
• Run-Time Self-Programming (RTSP)
ICSP
dsPIC33FJ16MC304 device to be serially programmed
while in the end application circuit. This is done with
two lines for programming clock and programming data
(one of the alternate programming pin pairs: PGC1/
PGD1, PGC2/PGD2 or PGC3/PGD3), and three other
lines for power (V
(MCLR). This allows customers to manufacture boards
with unprogrammed devices and then program the dig-
FIGURE 4-1:
© 2007 Microchip Technology Inc.
Note:
programming capability
allows
FLASH PROGRAM MEMORY
This data sheet summarizes the features
of
dsPIC33FJ16MC304 devices. It is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “dsPIC33F
Family Reference Manual”. Please see
the Microchip web site (www.micro-
chip.com) for the latest dsPIC33F Family
Reference Manual sections.
dsPIC33FJ32MC202/204
the
Using
Program Counter
Using
Table Instruction
User/Configuration
Space Select
a
DD
), ground (V
dsPIC33FJ32MC202/204
dsPIC33FJ32MC202/204
ADDRESSING FOR TABLE REGISTERS
SS
) and Master Clear
1/0
0
DD
TBLPAG Reg
range.
8 bits
and
and
and
Preliminary
Program Counter
24-bit EA
24 bits
ital signal controller just before shipping the product.
This also allows the most recent firmware or a custom
firmware to be programmed.
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions. With RTSP, the user
application can write program memory data either in
blocks or ‘rows’ of 64 instructions (192 bytes) at a time
or a single program memory word, and erase program
memory in blocks or ‘pages’ of 512 instructions (1536
bytes) at a time.
4.1
Regardless of the method used, all programming of
Flash memory is done with the table read and table
write instructions. These allow direct read and write
access to the program memory space from the data
memory while the device is in normal operating mode.
The 24-bit target address in the program memory is
formed using bits <7:0> of the TBLPAG register and the
Effective Address (EA) from a W register specified in
the table instruction, as shown in Figure 4-1.
The TBLRDL and the TBLWTL instructions are used to
read or write to bits <15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
both Word and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits <23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
Working Reg EA
16 bits
Table Instructions and Flash
Programming
0
Byte
Select
DS70283B-page 51