DSPIC33FJ32MC204-I/PT Microchip Technology Inc., DSPIC33FJ32MC204-I/PT Datasheet - Page 286

• Manufacturer Part Number: DSPIC33FJ32MC204-I/PT
• Description: 16-BIT DSC, 44LD, 32KB FLASH, MOTOR, 40 MIPS, NANOWATT
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC33FJ32MC204-I/PT

• A/d Inputs: 9-Channels, 10-Bit
• Cpu Speed: 40 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 35
• Interface: I2C, SPI, UART/USART
• Ios: 35
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 44-pin TQFP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Timers: 3-16-bit, 1-32-bit
• Voltage, Range: 3-3.6 V
• Dc: 08+
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

F
Fail-Safe Clock Monitor..................................................... 103
Flash Program Memory....................................................... 51
Flexible Configuration ....................................................... 217
FSCM
I
I/O Ports ............................................................................ 107
I
I
In-Circuit Debugger ........................................................... 223
In-Circuit Emulation........................................................... 217
In-Circuit Serial Programming (ICSP) ....................... 217, 223
Infrared Support
Input Capture .................................................................... 141
Input Change Notification.................................................. 108
Instruction Addressing Modes............................................. 42
Instruction Set
Instruction-Based Power-Saving Modes ........................... 105
Interfacing Program and Data Memory Spaces .................. 47
Internal RC Oscillator
Internet Address................................................................ 287
DS70283B-page 284
2
2
C
C Module
Control Registers ........................................................ 52
Operations .................................................................. 52
Programming Algorithm .............................................. 55
RTSP Operation.......................................................... 52
Table Instructions........................................................ 51
Delay for Crystal and PLL Clock Sources ................... 61
Device Resets ............................................................. 61
Parallel I/O (PIO)....................................................... 107
Write/Read Timing .................................................... 108
Addresses ................................................................. 187
Baud Rate Generator ................................................ 185
General Call Address Support .................................. 187
Interrupts ................................................................... 185
IPMI Support ............................................................. 187
Master Mode Operation
Operating Modes ...................................................... 185
Registers ................................................................... 185
Slave Address Masking ............................................ 187
Slope Control ............................................................ 188
Software Controlled Clock Stretching
I2C1 Register Map ...................................................... 35
Built-in IrDA Encoder and Decoder ........................... 197
External IrDA, IrDA Clock Output.............................. 197
Registers ................................................................... 142
File Register Instructions ............................................ 42
Fundamental Modes Supported.................................. 43
MAC Instructions......................................................... 43
MCU Instructions ........................................................ 42
Move and Accumulator Instructions ............................ 43
Other Instructions........................................................ 43
Overview ................................................................... 228
Summary................................................................... 225
Idle ............................................................................ 106
Sleep ......................................................................... 105
Use with WDT ........................................................... 222
Clock Arbitration................................................ 188
Multi-Master Communication, Bus
(STREN = 1) ..................................................... 187
Collision and Bus Arbitration..................... 188
Preliminary
Interrupt Control and Status Registers ............................... 67
Interrupt Setup Procedures................................................. 93
Interrupt Vector Table (IVT) ................................................ 63
Interrupts Coincident with Power Save Instructions ......... 106
J
JTAG Boundary Scan Interface ........................................ 217
JTAG Interface.................................................................. 223
M
Memory Organization ......................................................... 25
Microchip Internet Web Site.............................................. 287
Modulo Addressing ............................................................. 44
Motor Control PWM .......................................................... 147
Motor Control PWM Module
MPLAB ASM30 Assembler, Linker, Librarian ................... 234
MPLAB ICD 2 In-Circuit Debugger ................................... 235
MPLAB ICE 2000 High-Performance Universal
MPLAB Integrated Development Environment
MPLAB PM3 Device Programmer .................................... 235
MPLAB REAL ICE In-Circuit Emulator System ................ 235
MPLINK Object Linker/MPLIB Object Librarian ................ 234
N
NVM Module
O
Open-Drain Configuration................................................. 108
Oscillator Configuration ...................................................... 95
Output Compare ............................................................... 143
P
Packaging ......................................................................... 275
Peripheral Module Disable (PMD) .................................... 106
PICSTART Plus Development Programmer..................... 236
Pinout I/O Descriptions (table)............................................ 11
PMD Module
POR and Long Oscillator Start-up Times ........................... 61
PORTA
PORTB
IECx ............................................................................ 67
IFSx ............................................................................ 67
INTCON1 .................................................................... 67
INTCON2 .................................................................... 67
IPCx ............................................................................ 67
Initialization ................................................................. 93
Interrupt Disable ......................................................... 93
Interrupt Service Routine ............................................ 93
Trap Service Routine .................................................. 93
Applicability................................................................. 45
Operation Example ..................................................... 44
Start and End Address ............................................... 44
W Address Register Selection .................................... 44
2-Output Register Map ............................................... 34
6-Output Register Map for dsPIC33FJ12MC202........ 34
In-Circuit Emulator .................................................... 235
Software ................................................................... 233
Register Map .............................................................. 41
Details....................................................................... 276
Marking ..................................................................... 275
Register Map .............................................................. 41
Register Map for dsPIC33FJ32MC202....................... 39
Register Map for dsPIC33FJ32MC204
Register Map .............................................................. 40
and dsPIC33FJ16MC304 ................................... 39
© 2007 Microchip Technology Inc.