DSPIC33FJ32MC204-I/PT Microchip Technology Inc., DSPIC33FJ32MC204-I/PT Datasheet - Page 4

• Manufacturer Part Number: DSPIC33FJ32MC204-I/PT
• Description: 16-BIT DSC, 44LD, 32KB FLASH, MOTOR, 40 MIPS, NANOWATT
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC33FJ32MC204-I/PT

• A/d Inputs: 9-Channels, 10-Bit
• Cpu Speed: 40 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 35
• Interface: I2C, SPI, UART/USART
• Ios: 35
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 44-pin TQFP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Timers: 3-16-bit, 1-32-bit
• Voltage, Range: 3-3.6 V
• Dc: 08+
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

Motor Control Peripherals:
• 6-channel 16-bit Motor Control PWM:
• 2-channel 16-bit Motor Control PWM:
• Quadrature Encoder Interface module:
Analog-to-Digital Converters (ADCs):
• 10-bit, 1.1 Msps or 12-bit, 500 Ksps conversion:
DS70283B-page 2
- 3 duty cycle generators
- Independent or Complementary mode
- Programmable dead time and output polarity
- Edge-aligned or center-aligned
- Manual output override control
- 1 Fault input
- Trigger for ADC conversions
- PWM frequency for 16-bit resolution
- PWM frequency for 11-bit resolution
- 1 duty cycle generator
- Independent or Complementary mode
- Programmable dead time and output polarity
- Edge-aligned or center-aligned
- Manual output override control
- 1 Fault input
- Trigger for ADC conversions
- PWM frequency for 16-bit resolution
- PWM frequency for 11-bit resolution
- Phase A, Phase B and index pulse input
- 16-bit up/down position counter
- Count direction status
- Position Measurement (x2 and x4) mode
- Programmable digital noise filters on inputs
- Alternate 16-bit Timer/Counter mode
- Interrupt on position counter rollover/underflow
- 2 and 4 simultaneous samples (10-bit ADC)
- Up to 9 input channels with auto-scanning
- Conversion start can be manual or
- Conversion possible in Sleep mode
- ±2 LSb max integral nonlinearity
- ±1 LSb max differential nonlinearity
(@ 40 MIPS) = 1220 Hz for Edge-Aligned
mode, 610 Hz for Center-Aligned mode
(@ 40 MIPS) = 39.1 kHz for Edge-Aligned
mode, 19.55 kHz for Center-Aligned mode
(@ 40 MIPS) = 1220 Hz for Edge-Aligned
mode, 610 Hz for Center-Aligned mode
(@ 40 MIPS) = 39.1 kHz for Edge-Aligned
mode, 19.55 kHz for Center-Aligned mode
synchronized with 1 of 4 trigger sources
Preliminary
CMOS Flash Technology:
• Low-power, high-speed Flash technology
• Fully static design
• 3.3V (±10%) operating voltage
• Industrial and Extended temperature
• Low power consumption
Communication Modules:
• 4-wire SPI:
• I
• UART:
Packaging:
• 28-pin SDIP/SOIC/QFN-S
• 44-pin QFN/TQFP
- Framing supports I/O interface to simple
- Supports 8-bit and 16-bit data
- Supports all serial clock formats and
- Full Multi-Master Slave mode support
- 7-bit and 10-bit addressing
- Bus collision detection and arbitration
- Integrated signal conditioning
- Slave address masking
- Interrupt on address bit detect
- Interrupt on UART error
- Wake-up on Start bit from Sleep mode
- 4-character TX and RX FIFO buffers
- LIN bus support
- IrDA
- High-Speed Baud mode
- Hardware Flow Control with CTS and RTS
Note:
2
C™:
codecs
sampling modes
®
encoding and decoding in hardware
See the device variant tables for exact
peripheral features per device.
© 2007 Microchip Technology Inc.