C8051F411-GMR Silicon Laboratories Inc, C8051F411-GMR Datasheet - Page 205

Microcontrollers (MCU) 50 MIPS 32KB 12ADC RTCLOCK 28 PIN MCU

C8051F411-GMR

Manufacturer Part Number
C8051F411-GMR
Description
Microcontrollers (MCU) 50 MIPS 32KB 12ADC RTCLOCK 28 PIN MCU
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F411-GMR

Processor Series
C8051F4x
Core
8051
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
2.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
20
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F410DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 20 Channel
On-chip Dac
12 bit, 2 Channel
Package
28QFN EP
Device Core
8051
Family Name
C8051F41x
Maximum Speed
50 MHz
Ram Size
2.25 KB
Operating Supply Voltage
1.8|2.5|3.3|5 V
Operating Temperature
-40 to 85 °C
Lead Free Status / Rohs Status
 Details

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Quantity
Price
Part Number:
C8051F411-GMR
Manufacturer:
SiliconL
Quantity:
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Part Number:
C8051F411-GMR
Manufacturer:
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Quantity:
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Part Number:
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1000
1110
1100
Values Read
0
0
0
1
0
0
0
0
X A master START was generated.
X
0
1
Current SMbus State
A master data or address byte
was transmitted; NACK received.
A master data or address byte
was transmitted; ACK received.
A master data byte was received;
ACK requested.
Table 21.4. SMBus Status Decoding
Rev. 1.1
Typical Response Options
Load slave address + R/W
into SMB0DAT.
Set STA to restart transfer.
Abort transfer.
Load next data byte into
SMB0DAT.
End transfer with STOP.
End transfer with STOP and
start another transfer.
Send repeated START.
Switch to Master Receiver
Mode (clear SI without writ-
ing new data to SMB0DAT).
Acknowledge received byte;
Read SMB0DAT.
Send NACK to indicate last
byte, and send STOP.
Send NACK to indicate last
byte, and send STOP fol-
lowed by START.
Send ACK followed by
repeated START.
Send NACK to indicate last
byte, and send repeated
START.
Send ACK and switch to
Master Transmitter Mode
(write to SMB0DAT before
clearing SI).
Send NACK and switch to
Master Transmitter Mode
(write to SMB0DAT before
clearing SI).
C8051F410/1/2/3
0
1
0
0
0
1
1
0
0
0
1
1
1
0
0
Written
Values
0
0
1
0
1
1
0
0
0
1
1
0
0
0
0
X
X
X
X
X
X
X
X
205
1
0
0
1
0
1
0

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