ZLF645S0P2032G Zilog, ZLF645S0P2032G Datasheet - Page 149

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ZLF645S0P2032G

Manufacturer Part Number
ZLF645S0P2032G
Description
Microcontrollers (MCU) 32K Flash 512B RAM 20 pin
Manufacturer
Zilog
Datasheet

Specifications of ZLF645S0P2032G

Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
512 KB
Interface Type
ICP, UART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Package / Case
PDIP-20
Minimum Operating Temperature
0 C
Lead Free Status / Rohs Status
 Details
[
Table 70. Stop Mode Recovery Register (SMR)
PS026407-0408
Bit
Field
Reset
R/W
Address
Bit Position
[7]
[6]
[5]
[4:2]
Stop
Flag
R
7
0
Value Description
000
001
010
100
101
011
110
111
0
1
0
1
0
1
Recovery Level
Stop Mode
Stop Flag —Indicates whether last startup was power-on reset or Stop Mode
Recovery. A write to this bit has no effect.
Power-on reset.
Stop Mode Recovery.
Stop Mode Recovery Level —Selects whether an SMR[4:2]-selected SMR is
initiated by a Low or High level at the XOR-gate input
(see
Low.
High.
Stop Delay —Controls the reset delay after recovery. Must be 1 if using a crystal
or resonator clock source.
Off.
On.
Stop Mode Recovery Source —Specifies a Stop Mode Recovery wake-up
source at the XOR gate input (see
changed by a Stop Mode Recovery. The following equations ignore any Port pin
configured as output or selected in SMR1 or SMR3.
No SMR register source selected.
Reserved.
P31.
P32.
P33.
P27.
Port 2 NOR 0–3.
Port 2 NOR 0–7.
W
6
0
Figure 44 on page
Delay
Stop
W
5
1
Bank F: 0Bh; Linear: F0Bh
140).
Stop Mode Recovery
W
4
0
Source
W
3
0
Figure 44 on page
W
2
0
ZLF645 Series Flash MCUs
Reset/Stop Mode Recovery Status
Reset Time
Reduction
Product Specification
W
1
0
140). This value is not
Divide-by-16
SCLK/TCLK
W
0
0
141

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