ZLF645S0P2032G Zilog, ZLF645S0P2032G Datasheet - Page 65

• Manufacturer Part Number: ZLF645S0P2032G
• Description: Microcontrollers (MCU) 32K Flash 512B RAM 20 pin
• Manufacturer: Zilog

Specifications of ZLF645S0P2032G

• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 512 KB
• Interface Type: ICP, UART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Package / Case: PDIP-20
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details

Table 29. In-Circuit Programmer Commands
PS026407-0408
ICP In-Circuit Programming Commands
ICP Command
Read ICP Revision
Reserved
Read ICP Status Register
Reserved
Write ICP Control Register
Read ICP Control Register
Reserved
Write Flash Controller
Registers
As the ICP interface uses a single pin for both receive and transmit, it can only receive or
transmit at a given time. For the most part, this is not a problem, as the ICP uses a host
driven protocol (Z8
To aid the ICP in avoiding collisions, the transmitter waits an additional 1/2 bit times after
a Stop bit is fully received or transmitted before it starts transmission of a character. On
the other hand, the receiver starts searching for a Start bit as soon as the middle of the Stop
bit has been sampled and is valid. The transmitter does not start if another character is
being received.
The host communicates to the ICP by sending ICP commands using the ICP interface.
During normal operation, only a subset of the ICP commands are available. In FLASH
CONTROL mode, all ICP commands are available, but for few commands their access to
the Flash is qualified based upon the programming of the Flash Read/Write Protect Option
bit (
either of these bits is enabled, some of the ICP commands will have reduced Flash
memory access or will be disabled completely.
Table 29
detail in the bulleted list following this table.
operate when the device is not in FLASH CONTROL mode (normal operation) and how
those commands are effected by programming of the
FLRWP
is a summary of the ICP commands. Each ICP command is described in further
) or the Lower Half Flash Read/Write Protect Option bit (
Command
Byte
00H
01H
02H
03H
04H
05H
06H – 07H
08H
®
does not send any data without the host asking for it).
Enabled when NOT
in FLASH CONTROL
mode?
Yes
—
Yes
No
Yes
Yes
No
No
Table 29
FLRWP
ICP In-Circuit Programming Commands
also indicates those commands that
Disabled by
Flash Read/Write Protect
Option Bits (FLRWP and/or
FLPROT1)
—
—
—
—
—
—
ZLF645 Series Flash MCUs
and
Product Specification
FLPROT1
FLPROT1
Option bits.
). When
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