ZLF645S0P2032G Zilog, ZLF645S0P2032G Datasheet - Page 27

• Manufacturer Part Number: ZLF645S0P2032G
• Description: Microcontrollers (MCU) 32K Flash 512B RAM 20 pin
• Manufacturer: Zilog

Specifications of ZLF645S0P2032G

• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 512 KB
• Interface Type: ICP, UART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Package / Case: PDIP-20
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details

PS026407-0408
Table 11. I/O Port Control Registers
12-Bit
000
001
002
003
F08
F09
0F6
0F7
0F8
F00
Note:
Address (Hex)
Bank
0–3
0–3
0–3
0–3
0–3
All
All
All
F
F
During POR and WDT Reset, the internally generated reset drives the reset pin Low for
the POR time. Any device driving the external reset line must be open-drain to avoid
damage from a possible conflict during reset conditions. A pull-up is provided internally
for the reset pin, if available. When the ZLF645 MCU asserts (Low) the RESET pin, the
internal pull-up is disabled. The ZLF645 MCU does not assert the RESET pin when the
VDD voltage is below the VBO trip point level (for more details, see
Management
The external reset does not initiate an exit from STOP mode.
Table 11
affected by control registers for other peripheral functions.
8-Bit Register Description
F6
F7
F8
00
01
02
03
08
09
00
lists the registers used to control I/O ports. Some port pin functions can also be
on page 132).
Port 0 Register
Port 1 Register
Port 2 Register
Port 3 Register
Port 4 Register
Port 4 Mode Register
Port 2 Mode Register
Port 3 Mode Register
Port 0/1 Mode Register
Port Configuration Register
Mnemonic
P0
P1
P2
P3
P4
P4M
P2M
P3M
P01M
PCON
ZLF645 Series Flash MCUs
Reset
XXh
XXh
XXh
0Xh
XXh
FFh
FFh
X X X X _ X 0 0 0 b
X 1 X X _ X XX1 b
X X X X _ 1 1 1 0 b
Product Specification
RESET (Input, Active Low)
Reset and Power
Page No
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33
35
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40
39
34
36
31
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