ZLF645S0P2032G Zilog, ZLF645S0P2032G Datasheet - Page 72

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ZLF645S0P2032G

Manufacturer Part Number
ZLF645S0P2032G
Description
Microcontrollers (MCU) 32K Flash 512B RAM 20 pin
Manufacturer
Zilog
Datasheet

Specifications of ZLF645S0P2032G

Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
512 KB
Interface Type
ICP, UART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Package / Case
PDIP-20
Minimum Operating Temperature
0 C
Lead Free Status / Rohs Status
 Details
Flash Controller
Flash Memory Overview
PS026407-0408
Note:
Note:
The ZLF645 products feature either 32 KB or 64 KB of non-volatile Flash memory with
read/write/erase capability. The Flash memory provides a 16-bit data interface but
supports both 16-bit and 8-bit programming and read operations. The Flash memory can
be programmed, read, or erased by the Flash Controller directed by either user code or the
In-Circuit Programmer (ICP) interface pin. All user code or ICP Flash Accesses use the
Flash’s byte access mode where programs and reads occur 8 bits at a time. A Flash Byte
Programming interface, as described in the
is also available for Flash accesses through the devices GPIO pins and bypassing the Flash
Controller. When the Flash Byte Programming interface is used, Flash programming and
reads can be done either 8-bits or 16-bits at a time, depending on the package type of the
device.
The Flash memory consists of two blocks, the Main Memory and the Information
Block. The Flash main memory is arranged in pages with 512 bytes per page. The data
interface to the Flash memory supports both 16-bit and 8-bit data programming and data
reads. Although 512-byte page is the minimum Flash block size that can be erased. Each
page is divided into 8 rows of 64 bytes.
The term ‘page’ in the context of the Flash Controller is not equivalent to the Z8
CPU architecture’s Program Memory page. For Flash contents protection, the Flash main
memory is also divided into sectors, each sector containing 16 consecutive pages.
In addition to the Flash main memory, there is a 256-byte Information block, arranged
as 4 rows of 64 bytes. Each row is defined as a page. User access is only allowed to Page
3, where user definable Option bits reside. Pages 2-0 are for Zilog
Information block does not have a Flash contents sector protection mechanism.
Table 33
ZLF645 products. The size and configuration of the Information block is the same for all
devices.
Table 33. ZLF645 Products Flash Memory Configurations
Part Number
ZLF645xxxxx32
ZLF645xxxxx64
Figure 19
lists the Flash main memory configuration for each device in the family of
displays the Flash memory arrangement.
Flash Size
KBytes
32 KB
64 KB
Pages
Flash
128
64
Flash Byte Programming Interface
Program Memory
0000H–FFFFH
0000H–7FFFH
Addresses
ZLF645 Series Flash MCUs
Product Specification
®
internal use.
Flash Sector
8 KB
8 KB
Size
Flash Controller
on page 76,
®
LXMC
64

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