ZLF645S0P2032G Zilog, ZLF645S0P2032G Datasheet - Page 64

• Manufacturer Part Number: ZLF645S0P2032G
• Description: Microcontrollers (MCU) 32K Flash 512B RAM 20 pin
• Manufacturer: Zilog

Specifications of ZLF645S0P2032G

• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 512 KB
• Interface Type: ICP, UART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Package / Case: PDIP-20
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details

PS026407-0408
ICP Serial Errors
For optimal operation with asynchronous datastreams, the maximum recommended baud
rate is the system clock frequency divided by 8. The maximum possible baud rate for
asynchronous datastreams is the system clock frequency divided by 4, but this theoretical
maximum is possible only for low noise designs with clean signals.
minimum and recommended maximum baud rates for sample crystal frequencies.
Table 28. ICP Baud-Rate Limits
If the ICP receives a Serial Break (nine or more continuous bits Low) the Auto-Baud
Detector/Generator resets. You can reconfigure the Auto-Baud Detector/Generator by
sending character
The ICP can detect any of the following error conditions on the P34 pin when in ICP
mode:
•
•
•
When the ICP detects one of these errors, it aborts any command currently in progress,
transmits a four character long Serial Break back to the host, and resets the Auto-Baud
Detector/Generator. A Framing Error or Transmit Collision can be caused by the host
sending a Serial Break to the ICP. Because of the open-drain nature of the interface,
returning a Serial Break break back to the host only extends the length of the Serial Break,
if the host releases the Serial Break early.
The host transmits a Serial Break on the ICP pin when first connecting to the device or
recovering from an error. A Serial Break from the host resets the Auto-Baud Generator/
Detector but does not resets the
DEBUG mode if that is the current mode. The ICP is held in Reset until the end of the
Serial Break when the ICP pin returns High. Because of the open-drain nature of the ICP
pin, the host can send a Serial Break to the ICP even if the ICP is transmitting a character.
System Clock
Frequency
(MHz)
8.0
1.0
0.032768 (32 kHz)
Serial Break (a minimum of nine continuous bits Low).
Framing Error (received
Transmit Collision (ICP and host simultaneous transmission detected by the ICP).
80H.
Recommended
Maximum Baud
Rate (Kbps)
1000.0
125.0
Stop
4.096
ICP Control
bit is Low).
Register. A Serial Break leaves the device in
Recommended
Standard PC Baud
Rate (bps)
737280
115,200
2400
ZLF645 Series Flash MCUs
Product Specification
ICP Interface Operation
Minimum Baud
Rate (Kbps)
15.6
1.95
Table 28
0.064
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