ZLF645S0P2032G Zilog, ZLF645S0P2032G Datasheet - Page 76

• Manufacturer Part Number: ZLF645S0P2032G
• Description: Microcontrollers (MCU) 32K Flash 512B RAM 20 pin
• Manufacturer: Zilog

Specifications of ZLF645S0P2032G

• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 512 KB
• Interface Type: ICP, UART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Package / Case: PDIP-20
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details

PS026407-0408
Caution:
Flash Operation Timing Using Flash Frequency Registers
Flash Code Protection Against External Access
Flash Code Protection Against Accidental Program and Erasure
Before a program or erase operation on Flash memory, you must first configure the Flash
frequency High and Low Byte registers. The Flash frequency registers allow
programming and erasing of the Flash with CPU clock frequencies ranging from 1 MHz to
8 MHz. The Flash Frequency High and Low Byte registers combine to form a 16-bit value
(FFREQ) to control timing for Flash program and erase operations. The 16-bit binary
Flash Frequency value must contain two times the system clock frequency (in kHz).
This 16-bit binary Flash Frequency value is calculated using the following equation:
The System Clock Frequency depends on the Flash memory programming of bit 2 of the
User Option Byte 1 and on the register programming of bit 0 of the SMR register and can
be equal to the clock input frequency on the XTAL1 pin, a divide by 2 of that input, a divide
by 16 of that input, or a divide by 32 of that input. Flash programming and erasure are not
supported for CPU clock frequencies below 1 MHz or above 8 MHz. The Flash Frequency
High and Low Byte registers must be loaded with the correct values.
User code within the Flash main memory can be protected from external access through
the ICP or Flash Byte Programming interfaces. By use of the Flash Protect Option bits in
User Option byte 1 of the Flash Information Area, read access to the Flash’s main memory
can be blocked. For more information, see
The ZLF645 products provide several levels of protection against accidental program and
erasure of the Flash main memory contents. This protection is provided by a combination
of the register locking mechanism, the page select redundancy, and the sector level
protection control of the Flash Controller. Similar levels of protection are in place for the
Flash Information Area, minus the sector level protection.
Flash Code Protection Using Flash Controller
On Reset, the Flash Controller locks to prevent accidental program or erasure of the Flash
memory. To program or erase the Flash memory, first write the Page Select register with
the target page. Unlock the Flash Controller by making two consecutive writes to the
Flash Control register with the values
must be rewritten with the same page previously stored there. If the two Page Select writes
FREQ[15:0]
=
2x
-------------------------------------------------------------------------------------- -
System Clock Frequency (Hz)
1000
73H
Table 86
and
8CH
, sequentially. The Page Select register
on page 169.
ZLF645 Series Flash MCUs
Product Specification
Flash Controller Operation
68