ISP1563BMGA ST-Ericsson Inc, ISP1563BMGA Datasheet - Page 57

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ISP1563BMGA

Manufacturer Part Number
ISP1563BMGA
Description
IC USB HOST CTRL HI-SPD 128LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1563BMGA

Applications
USB Host/Function Processor
Interface
EHCI Interface
Voltage - Supply
3 V ~ 3.6 V
Package / Case
128-LQFP
Mounting Type
Surface Mount
For Use With
UM10066 - EVAL BRD FOR ISP1563
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ISP1563BM-S
ISP1563BM-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1563BMGA
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Philips Semiconductors
Table 76:
Address: Value read from func0 or func1 of address 10h + 44h
[1]
Table 78:
Address: Value read from func0 or func1 of address 10h + 48h
9397 750 14224
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
HcLSThreshold - Host Controller LS Threshold register bit allocation
HcRhDescriptorA - Host Controller Root Hub Descriptor A register bit allocation
11.1.18 HcLSThreshold register
11.1.19 HcRhDescriptorA register
R/W
R/W
R/W
R/W
R/W
31
23
15
31
0
0
0
7
0
1
This register contains an 11-bit value used by the Host Controller to determine whether to
commit to the transfer of a maximum of 8 B low-speed packet before EOF. Neither the
Host Controller nor the HCD can change this value. For bit allocation, see
Table 77:
Address: Value read from func0 or func1 of address 10h + 44h
This register is the first of two registers describing the characteristics of the Root Hub.
Reset values are implementation-specific.
Table 78
Bit
31 to 12
11 to 0
R/W
R/W
R/W
R/W
R/W
30
22
14
30
0
0
0
6
0
1
shows the bit allocation of the HcRhDescriptorA register.
reserved
HcLSThreshold - Host Controller LS Threshold register bit description
Symbol
reserved
LST[11:0] LS Threshold: This field contains a value that is compared to the FR[13:0]
[1]
R/W
R/W
R/W
R/W
R/W
29
21
13
29
0
0
0
5
1
1
Description
-
field, before initiating a low-speed transaction. The transaction is started
only if FR ≥ this field. The value is calculated by the HCD, considering the
transmission and setup overhead.
Rev. 01 — 14 July 2005
R/W
R/W
R/W
R/W
R/W
28
20
12
28
0
0
0
4
0
1
POTPGT[7:0]
reserved
reserved
LST[7:0]
[1]
[1]
R/W
R/W
R/W
R/W
R/W
27
19
11
27
0
0
0
3
1
1
R/W
R/W
R/W
R/W
R/W
26
18
10
26
0
0
1
2
0
1
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
HS USB PCI Host Controller
LST[11:8]
R/W
R/W
R/W
R/W
R/W
25
17
25
0
0
9
1
1
0
1
ISP1563
Table
76.
R/W
R/W
R/W
R/W
R/W
57 of 107
24
16
24
0
0
8
0
0
0
1

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