ISP1563BMGA ST-Ericsson Inc, ISP1563BMGA Datasheet - Page 61

• Manufacturer Part Number: ISP1563BMGA
• Description: IC USB HOST CTRL HI-SPD 128LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1563BMGA

• Applications: USB Host/Function Processor
• Interface: EHCI Interface
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 128-LQFP
• Mounting Type: Surface Mount
• For Use With: UM10066 - EVAL BRD FOR ISP1563
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISP1563BM-S; ISP1563BM-S

Philips Semiconductors
9397 750 14224
Product data sheet
11.1.22 HcRhPortStatus[4:1] register
Table 83:
Address: Value read from func0 or func1 of address 10h + 50h
The HcRhPortStatus[4:1] register is used to control and report port events on a per-port
basis. NumberDownstreamPorts represent the number of HcRhPortStatus registers that
are implemented in hardware. The lower word reflects the port status. The upper word
reflects the status change bits. Some status bits are implemented with special write
behavior. If a transaction, token through handshake, is in progress when a write to change
port status occurs, the resulting port status change is postponed until the transaction
completes. Always write logic 0 to the reserved bits. The bit allocation of the register is
given in
Bit
31
30 to 18
17
16
15
14 to 2
1
0
Table
HcRhStatus - Host Controller Root Hub Status register bit description
Symbol
CRWE
reserved
CCIC
LPSC
DRWE
reserved
OCI
LPS
84.
Description
On write, Clear Remote Wake-up Enable:
0 — No effect
1 — Clears DRWE (Device Remote Wake-up Enable).
-
Overcurrent Indicator Change: This bit is set by hardware when a
change has occurred to the OCI bit of this register.
0 — No effect
1 — The HCD clears this bit.
On read, Local Power Status Change: The Root Hub does not support
the local power status feature. Therefore, this bit is always logic 0.
On write, Set Global Power: In global power mode (Power Switching
Mode = 0), logic 1 is written to this bit to turn on power to all ports (clear
Port Power Status). In per-port power mode, it sets Port Power Status only
on ports whose Port Power Control Mask bit is not set. Writing logic 0 has
no effect.
On read, Device Remote Wake-up Enable: This bit enables bit Connect
Status Change (CSC) as a resume event, causing a state transition from
USBSUSPEND to USBRESUME and setting the Resume Detected
interrupt.
0 — CSC is not a remote wake-up event
1 — CSC is a remote wake-up event.
On write, Set Remote Wake-up Enable: Writing logic 1 sets DRWE
(Device Remote Wake-up Enable). Writing logic 0 has no effect.
-
Overcurrent Indicator: This bit reports overcurrent conditions when
global reporting is implemented. When set, an overcurrent condition
exists. When cleared, all power operations are normal. If the per-port
overcurrent protection is implemented, this bit is always logic 0.
On read, Local Power Status: The Root Hub does not support the local
power status feature. Therefore, this bit is always read as logic 0.
On write, Clear Global Power: In global power mode (Power Switching
Mode = 0), logic 1 is written to this bit to turn off power to all ports (clear
Port Power Status). In per-port power mode, it clears Port Power Status
only on ports whose Port Power Control Mask bit is not set. Writing logic 0
has no effect.
Rev. 01 — 14 July 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
HS USB PCI Host Controller
ISP1563
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