ISP1563BMGA ST-Ericsson Inc, ISP1563BMGA Datasheet - Page 84

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ISP1563BMGA

Manufacturer Part Number
ISP1563BMGA
Description
IC USB HOST CTRL HI-SPD 128LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1563BMGA

Applications
USB Host/Function Processor
Interface
EHCI Interface
Voltage - Supply
3 V ~ 3.6 V
Package / Case
128-LQFP
Mounting Type
Surface Mount
For Use With
UM10066 - EVAL BRD FOR ISP1563
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ISP1563BM-S
ISP1563BM-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1563BMGA
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Philips Semiconductors
Table 116: PORTSC 1, 2, 3, 4 - Port Status and Control, 1, 2, 3, 4 register bit allocation
Address: Value read from func2 of address 10h + 64h + (4 × Port Number − 1) where Port Number is 1, 2, 3, 4
[1]
9397 750 14224
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
reserved
SUSP
R/W
R/W
R/W
31
23
15
R
0
0
0
7
0
PIC[1:0]
[1]
If the port has power control, software cannot change the state of the port until it sets the
port power bits. Software must not attempt to change the state of the port until power is
stable on the port; maximum delay is 20 ms from the transition. For bit allocation, see
Table
Table 117: PORTSC 1, 2, 3, 4 - Port Status and Control, 1, 2, 3, 4 register bit description
Address: Value read from func2 of address 10h + 64h + (4 × Port Number − 1) where Port Number
is 1, 2, 3, 4
Bit
31 to 23 reserved
22
21
20
No device connected
Port disabled.
WKOC_E
116.
R/W
R/W
FPR
R/W
30
22
14
R
0
0
0
6
0
Symbol
WKOC_E Wake on Overcurrent Enable: Default = 0. Setting this bit enables the port
WKDSC
NNT_E
WKCNN
T_E
WKDSCNN
OCC
R/W
R/W
R/W
T_E
PO
Description
-
to be sensitive to overcurrent conditions as wake-up events.
Wake on Disconnect Enable: Default = 0. Setting this bit enables the port
to be sensitive to device disconnects as wake-up events.
Wake on Connect Enable: Default = 0. Setting this bit enables the port to be
sensitive to device connects as wake-up events.
29
21
13
R
0
0
1
5
0
Rev. 01 — 14 July 2005
WKCNNT_
OCA
R/W
R/W
R/W
PP
28
20
12
E
R
0
0
0
4
0
reserved
[1]
PEDC
R/W
R/W
R/W
R/W
27
19
11
0
0
0
3
0
LS[1:0]
PED
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
HS USB PCI Host Controller
PTC[3:0]
[1]
reserved
ECSC
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
[1]
ISP1563
[1]
[1]
ECCS
R/W
R/W
84 of 107
PR
24
16
R
R
0
0
8
0
0
0

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