PEF82912FV1.4 Infineon Technologies, PEF82912FV1.4 Datasheet - Page 167

• Manufacturer Part Number: PEF82912FV1.4
• Description: ISDN Interface ISDN
• Manufacturer: Infineon Technologies

Specifications of PEF82912FV1.4

• Mounting Style: SMD/SMT
• Package / Case: MQFP-64
• Lead Free Status / Rohs Status: Details

L1SW
EXLP
4.7.2
S_ CONF2
Value after reset: 80
DIS_TX
Data Sheet
Note: For the external loop the transmitter must be enabled (S_CONF2:DIS_TX = 0).
DIS_TX
7
S_CONF2 - S-Transmitter Configuration Register 2
1 =
Enable Layer 1 State Machine in Software
0 =
1 =
External Loop
In case the analog loopback is activated with C/I = ARL or with the LP_A bit
in the S_CMD register the loop is a
0 =
1 =
Disable Line Driver
0 =
1 =
0
ICV enabled. The receipt of at least one illegal code violation within
one multi-frame according to ANSI T1.605 is indicated by the C/I
indication ‘1011’ (CVR) in two consecutive IOM frames.
Layer 1 state machine of the Q-SMINT I is used.
Layer 1 state machine is disabled. The functionality must be
realized in software.
The commands are written to register S_CMD and the status read
in the S_STA.
internal loop next to the line pins
external loop which has to be closed between SR1/SR2 and SX1/
SX2
Transmitter is enabled
Transmitter is disabled
H
0
0
read/write
153
0
0
Register Description
PEF 82912/82913
Address:
0
2001-03-30
0
0
32
H