PEF82912FV1.4 Infineon Technologies, PEF82912FV1.4 Datasheet - Page 197

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PEF82912FV1.4

Manufacturer Part Number
PEF82912FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF82912FV1.4

Mounting Style
SMD/SMT
Package / Case
MQFP-64
Lead Free Status / Rohs Status
 Details

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a1 .. a3
d/m
i1 .. i8
4.11.5
Via the M4 Read Mask register, the user can selectively control which M4 bit changes
are reported via interrupt requests.
M4RMASK
Reset Value:
Bit 0..7
4.11.6
Access to the M4 Write Mask register (M4W) is controlled by the M4WMASK register.
By means of the M4WMASK register the user can control on a per bit base which M4
bits are controlled by the user and which are controlled by the state machine.
M4WMASK
Reset Value:
Data Sheet
7
7
M4RMASK - M4 Read Mask Register
M4WMASK - M4 Write Mask Register
address field
data/ message indicator
information field (8 codes are reserved by ANSI/ETSI for diagnostic and
loopback functions)
0 =
1 =
A8
00
6
6
H
M4 bit change indication by interrupt active
M4 bit change indication by interrupt masked
H
5
5
M4 Read Mask Bits
M4 Write Mask Bits
4
4
read*
read*
183
)
)
/write
/write
3
3
2
2
Register Description
PEF 82912/82913
Address:
Address:
1
1
2001-03-30
0
0
67
68
H
H

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