TXC-06412BROG Transwitch Corporation, TXC-06412BROG Datasheet - Page 100

• Manufacturer Part Number: TXC-06412BROG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06412BROG

• Lead Free Status / Rohs Status: Compliant

PHAST-12P Device
DATA SHEET
TXC-06412B
PRELIMINARY TXC-06412B-MB, Ed. 2
June 2005
Note: Some CDR/CS configurations are transferred to the CDR/CS part only after a software
command. Following settings will not have effect before transferring them:
After configuration of these fields, one has to set SerDes_LoadConfig to 0x1 in order to
make these settings effective. A transfer of the above mentioned configuration records will
start. SerDes_LoadConfig will be reset automatically by the device after the transfer is
completed (approx. 420 microprocessor clockcycles). Note however settings to other
addresses than those before mentioned are still possible during this transfer. The configured
registers will not be reset after transfer.
• Write 0x00 to TxRefClock2 PadPowerDown register (Address 0x3A34) if
• Power up the Rx pads: RxPadPowerDown register (Address 0x3A30)
• Write 0x00 to RxPowerDown1 register (Address 0x3A54)
• Write 0x00 to RxPowerDown2 register (Address 0x3A56)
• Write 0x00 to TxPowerDown register (Address 0x3A50)
• Write 0x00 to ToplevelPowerDown register (Address 0x3A58)
• Write 0x01 to SerDes_LoadConfig register (Address 0x3A20). This will cause the
• Wait until the SerDes_LoadConfig register (Address 0x3A20) is reset to 0x00 by the
• Power up the Tx pads: TxPadPowerDown register (Address 0x3A32)
• Take away the Software reset by writing 0x0000 to the RESETH register (Address
CDR_CS_Setup.TxPowerDown
CDR_CS_Setup.RxPowerDown1
CDR_CS_Setup.RxPowerDown2
CDR_CS_Setup.ToplevelPowerDown
CDR_CS_Setup.OC3NotOC12
PLL_Control.TxPLL_Cap_Enable
PLL_Control.RxPLL_Cap_Enable
PLL_Control.TxPLL_PowerDown
PLL_Control.RxPLL_PowerDown
PLL_Control.CDRTune
PLL_Control.PLLTune
All configurations done via the indirect access register (IndirectAccessData and
IndirectAccessMode)
REFTXCLK2 is used as reference clock
previous settings to be transferred to the CDR/CS/SerDes part (See Note below)
device
0x00A0). Other software resets can also be deasserted if any.
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Operation
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