TXC-06412BROG Transwitch Corporation, TXC-06412BROG Datasheet - Page 151

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TXC-06412BROG

Manufacturer Part Number
TXC-06412BROG
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-06412BROG

Lead Free Status / Rohs Status
Compliant
1 5 1 o f 2 26
11.19 TRAIL TRACE IDENTIFIER PROCESS
11.19.1 TTI Formats
The excessive signal defect (dEXC) is cleared if the accumulated BIP error count during the
clearing interval is less than EXC_RecoveryErrorThreshold errors. The interval duration is
EXC_RecoveryWindowSize * T.
The Poisson detector can be configured to work in BurstProtection mode, in that case the
configured error threshold needs to be exceeded during 2 consecutive intervals before the
defect is declared. This way one can protect the state machine against a burst of BER errors.
For B3 (POH) the BIP error counters have a overflow behaviour (instead of saturation). For
those counters a large DetectionErrorThreshold combined with a large DetectionWindowSize
can lead to an overflow and avoid correct detection of the DEG/EXC signal defects.
DetectionErrorThreshold and DetectionWindowSize (both for DEG and EXC detection) must
always be configured in such way no overflow of the BIP error counter can occur. For B2
(TOH) the BIP error counters have a saturating behaviour and are thus not vulnerable to this.
The following TTI formats or modes are supported:
Note:
The following TTI message types are supported:
• 16-byte trace message: 16-byte repeating pattern consisting of a 15-byte APId preceded
• 64-byte trace message: a 64-byte repeating pattern consisting of a 63-byte APId pre-
• 64-byte trace message with CR/LF: a 64-byte repeating pattern consisting of a 62-byte
• Repeating non-specific byte: a repeating single byte with fixed (constant), but unspecified
• Repeating specific byte: a repeating single byte with fixed (constant) value. The remote
by a one byte header. The most significant bits of the TTI bytes form a 16-bit TFAS with a
1 in the most significant bit of the first TTI byte (header byte) and a 0 in the most signifi-
cant bit of the APId bytes.
ceded by a one byte header. The most significant bits of the TTI bytes form a 64-bit TFAS
with a 1 in the most significant bit of the first TTI byte (header byte) and a 0 in the most
significant bit of the APId bytes.
APId followed by a two byte trailer. The trailer consists of the <CR> and <LF> ASCII char-
acters.
value.
end user knows in advance which value is expected.
- High Order Pointer Tracking, Retiming and Pointer Generation -
*The user has to specify TFAS, CRC or CR/LF both for monitoring (mismatch
detection) and generation.
*The repeating specific byte is handled as a 16-byte trace message without TFAS.
J0
J1
Repeating non-specific byte
Repeating specific byte
16-byte trace message
Repeating non-specific byte
16-byte trace message
64-byte trace message with TFAS
64-byte trace message with CR/LF
PRELIMINARY TXC-06412B-MB, Ed. 2
PHAST-12P Device
DATA SHEET
TXC-06412B
June 2005

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