TXC-06412BROG Transwitch Corporation, TXC-06412BROG Datasheet - Page 211
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TXC-06412BROG
Manufacturer Part Number
TXC-06412BROG
Description
Manufacturer
Transwitch Corporation
Datasheet
1.TXC-06412BROG.pdf
(226 pages)
Specifications of TXC-06412BROG
Lead Free Status / Rohs Status
Compliant
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2 1 1 o f 2 26
Offset
0x0000 0
Table 82: UTOPIA/POS-PHY Common Configuration
1
2
4 - 3
5
6
14 - 7
Bits
EnableInterface
MPHY
Reserved
StatusIndication
ParityEven
ParityOverDataOnly
DataAV_Threshold
Name
- Memory Maps and Bit Descriptions -
Init
0x1B Range 1 to 128
0x0 Enables the interface when 0x1.
0x1 Multiple PHY when 0x1, Single PHY when 0x0.
0x1 Reserved
0x1 0x0 = DIRECT_STATUS
0x0 Even parity when 0x1, odd parity when 0x0.
0x1 Parity over databus only when 0x1, over databus and control signals
Applies to both UTOPIA and POS-PHY mode.
Applies to both UTOPIA and POS-PHY mode.
0x1 = MUX_STATUS_POLLING_FULL_ADDR
0x2 = MUX_STATUS_POLLING_GROUP_ADDR
Applies to both UTOPIA and POS-PHY mode, note that for POS-PHY
mode the option multiplexed status polling with group address is not
valid.
Applies to both UTOPIA and POS-PHY mode.
when 0x0.
Applies to both UTOPIA and POS-PHY mode.
Minimum number of words which needs to be available in the FIFO
before the data available indication (PRPA/DRPA) is set on the POS-
PHY interface. This value must always be larger than 0.
Applies to POS-PHY mode only, for UTOPIA mode this must always
be set to 27 (0x1B).
(T_DO_UTOPIA_POSPHY_Common_Config)
Description
PRELIMINARY TXC-06412B-MB, Ed. 2
PHAST-12P Device
DATA SHEET
TXC-06412B
June 2005
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