GC80960RD66 Intel, GC80960RD66 Datasheet - Page 23

• Manufacturer Part Number: GC80960RD66
• Manufacturer: Intel

Specifications of GC80960RD66

• Family Name: i960 RX
• Device Core: 80960
• Device Core Size: 32b
• Frequency (max): 66MHz
• Supply Voltage 1 (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Temp Range: 0C to 95C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 352
• Package Type: HLBGA
• Lead Free Status / Rohs Status: Not Compliant

Table 6.
Datasheet
Interrupt Unit Signal Descriptions
NOTE:
S_INT[A:D]#/
1. PCI signal functions are summarized in this data sheet; refer to the PCI Local Bus Specification, Revision
XINT3:0#
XINT7:4#
2.1 for a more complete definition.
Name
NMI#
Type
A(L)
A(L)
A(L)
I
I
I
NON-MASKABLE INTERRUPT causes a non-maskable interrupt event to occur.
NMI# is the highest priority interrupt source and is level-detect. When NMI# is
unused, it is recommended that you connect it to V
SECONDARY PCI BUS INTERRUPT
and deassertion is asynchronous to S_CLK. A device asserts S_INTx# when
requesting attention from its device driver. When S_INTx# is asserted, it remains
asserted until the device driver clears the pending request. S_INTx# Interrupts
are level sensitive.
EXTERNAL INTERRUPT. External devices use this signal to request an interrupt
service. These signals operate in dedicated mode, where each signal is assigned
a dedicated interrupt level.
The S_INT[A:D]#/XINT3:0# signals can be directed as follows:
Sec. PCI Primary PCI80960 Core Processor
S_INTA#
S_INTB#
S_INTC#
S_INTD#
EXTERNAL INTERRUPT. External devices use this signal to request an interrupt
service. These signals operate in dedicated mode, where each signal is assigned
a dedicated interrupt level.
⇒
⇒
⇒
⇒
P_INTA#
P_INTB#
P_INTC#
P_INTD#
Intel
®
Description
or
or
or
or
i960
1
requests an interrupt. S_INTx# assertion
®
XINT0#
XINT1#
XINT2#
XINT3#
RX I/O Processor at 3.3 Volts
CC
.
Package Information
23