GC80960RD66 Intel, GC80960RD66 Datasheet - Page 48

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GC80960RD66

Manufacturer Part Number
GC80960RD66
Description
Manufacturer
Intel
Datasheet

Specifications of GC80960RD66

Family Name
i960 RX
Device Core
80960
Device Core Size
32b
Frequency (max)
66MHz
Supply Voltage 1 (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temp Range
0C to 95C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
352
Package Type
HLBGA
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
GC80960RD66
Manufacturer:
INTEL
Quantity:
20 000
Intel
Electrical Specifictions
4.4
Table 20.
Table 21.
48
®
i960
®
RX I/O Processor at 3.3 Volts
Targeted AC Specifications
Input Clock Timings
Synchronous Output Timings
T
T
T
T
T
T
NOTES:
T
T
T
T
T
T
T
NOTES:
Symbol
1. Inactive ALE refers to the falling edge of ALE. For inactive ALE timings, see
2. See
3. A float condition occurs when the output current becomes less than I
4. See
5. Outputs precharged to V
1. See
2. To ensure a 1:1 relationship between the amplitude of the input jitter and the internal clock, the jitter
3. Not tested.
Symbol
OV1
OV2
OV3
OV4
OV5
OF
F
C
CS
CH
CL
CR
CF
Timings” on page
designed to be no longer than the valid delay.
frequency spectrum should not have any power peaking between 500 KHz and 1/3 of the S_CLK
frequency.
Figure 10, “T
Figure 11, “T
Figure
Output Valid Delay - All Local Bus Signals Except
ALE Inactive and DT/R#
Output Valid Delay, DT/R#
Output Valid Delay - PCI Signals Except P_REQ#,
S_GNT0#/S_REQ#, and S_GNT5:1#
Output Valid Delay P_REQ#, S_GNT0#/S_REQ#,
and S_GNT5:1#
Output Valid Delay - DP3:0
Output Float Delay
S_CLK Frequency
S_CLK Period
S_CLK Period Stability
S_CLK High Time
S_CLK Low Time
S_CLK Rise Time
S_CLK Fall Time
9.
OF
OV
50.
Output Float Waveform” on page
Parameter
Output Delay Waveform” on page
CC5
Parameter
maximium.
Min
16
30
12
12
56.
33.33
±250
55.
Max
62.5
4
4
0.5 T
Units
MHz
V/ns
V/ns
Min
ns
ps
ns
ns
3
2
2
3
3
C
LO
+3 0.5 T
. Float delay is not tested, but is
(1)
Adjacent Clocks (2,3)
Measured at 1.5 V (2,3)
Measured at 1.5 V (2,3)
0.4 V to 2.4 V (2,3)
2.4 V to 0.4 V (2,3)
Table 23, “Relative Output
Max
15.5
12
19
13
11
C
+15
Notes
Units
ns
ns
ns
ns
ns
ns
Datasheet
(1,2,5)
(2,5)
(2,5)
(2,5)
(2,5)
(3,4,5)
Notes

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