GC80960RD66 Intel, GC80960RD66 Datasheet - Page 26

• Manufacturer Part Number: GC80960RD66
• Manufacturer: Intel

Specifications of GC80960RD66

• Family Name: i960 RX
• Device Core: 80960
• Device Core Size: 32b
• Frequency (max): 66MHz
• Supply Voltage 1 (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Temp Range: 0C to 95C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 352
• Package Type: HLBGA
• Lead Free Status / Rohs Status: Not Compliant

Intel
Package Information
Table 7.
26
®
i960
®
RX I/O Processor at 3.3 Volts
PCI Signal Descriptions (Sheet 3 of 3)
NOTE:
1. PCI signal functions are summarized in this data sheet; refer to the PCI Local Bus Specification, Revision
S_REQ4:1#
S_ARB_EN
S_REQ5#/
S_SERR#
S_STOP#
S_TRDY#
2.1 for a more complete definition.
Name
Type
R(Z)
R(Z)
R(Z)
S(L)
S(L)
OD
I/O
I/O
I/O
I
I
SECONDARY PCI BUS SYSTEM ERROR reports address and data parity
errors on the special cycle command, or any other system error where the
result would be catastrophic.
SECONDARY PCI BUS STOP indicates that the current target is requesting
the master to stop the current transaction on the secondary PCI bus.
SECONDARY PCI BUS TARGET READY indicates the target agent's
(selected device's) ability to complete the current data phase of the
transaction.
SECONDARY PCI BUS REQUEST 4:1 are request signals from devices
1-4 on the secondary PCI bus.
SECONDARY PCI BUS REQUEST 5 is the request signal from device 5 on
the secondary PCI bus.
SECONDARY PCI BUS ARBITER ENABLE defines the power-up status of
the internal secondary arbitration unit. A valid high at the deassertion of
P_RST# enables the internal secondary arbiter. A valid low at the
deassertion of P_RST# disables the internal secondary arbiter.
Description
1
Datasheet