MAX1243BCSA Maxim Integrated Products, MAX1243BCSA Datasheet - Page 18

• Manufacturer Part Number: MAX1243BCSA
• Description: ADC (A/D Converters) Integrated Circuits (ICs)
• Manufacturer: Maxim Integrated Products

Specifications of MAX1243BCSA

• Number Of Adc Inputs: 1
• Architecture: SAR
• Conversion Rate: 73 KSPs
• Resolution: 10 bit
• Input Type: Voltage
• Interface Type: 3-Wire (SPI, QSPI, Microwire)
• Voltage Reference: External
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 2.7 V
• Maximum Power Dissipation: 471 mW
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: SO-8
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: No

12-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
The MAX1221/MAX1223/MAX1343 integrate a multi-
channel 12-bit ADC, and an octal/quad 12-bit DAC in a
single IC. The devices also include a temperature sen-
sor and configurable GPIOs with a 25MHz SPI-/QSPI-/
MICROWIRE-compatible serial interface. The ADC is
available in a 12 or an eight input-channel version. The
DAC outputs settle within 2.0µs, and the ADC has a
225ksps conversion rate.
All devices include an internal reference (2.5V) provid-
ing a well-regulated, low-noise reference for both the
ADC and DAC. Programmable reference modes for the
ADC and DAC allow the use of an internal reference, an
external reference, or a combination of both. Features
such as an internal ±1°C accurate temperature sensor,
FIFO, scan modes, programmable internal or external
clock modes, data averaging, and AutoShutdown allow
users to minimize both power consumption and proces-
sor requirements. The low glitch energy (4nV
low digital feedthrough (0.5nV
DACs make these devices ideal for digital control of
fast-response closed-loop systems.
The devices are guaranteed to operate with a supply
voltage from +2.7V to +5.25V. The devices consume
2.5mA at 225ksps throughput, only 22µA at 1ksps
throughput, and under 0.2µA in the shutdown mode.
The MAX1221/MAX1343 offer four GPIOs that can be
configured as inputs or outputs.
Figure 1 shows the MAX1221 functional diagram. The
MAX1221/MAX1343 only include the GPIOA0, GPIOA1
and GPIOC0, GPIOC1 blocks. The MAX1223 excludes
the GPIOs. The output-conditioning circuitry takes the
internal parallel data bus and converts it to a serial
data format at DOUT, with the appropriate wake-up
timing. The arithmetic logic unit (ALU) performs the
averaging function.
The MAX1221/MAX1223/MAX1343 feature a serial inter-
face that is compatible with SPI and MICROWIRE
devices. For SPI, ensure the SPI bus master (typically a
microcontroller (µC)) runs in master mode so that it
generates the serial clock signal. Select the SCLK fre-
quency of 25MHz or less, and set the clock polarity
(CPOL) and phase (CPHA) in the µC control registers to
the same value. The MAX1221/MAX1223/MAX1343
operate with SCLK idling high or low, and thus operate
with CPOL = CPHA = 0 or CPOL = CPHA = 1. Set CS
18
______________________________________________________________________________________
SPI-Compatible Serial Interface
Detailed Description
•
s) of the integrated
•
s) and
low to latch any input data at DIN on the falling edge of
SCLK. Output data at DOUT is updated on the falling
edge of SCLK in clock modes 00, 01, and 10. Output
data at DOUT is updated on the rising edge of SCLK in
clock mode 11. See Figures 6–11. Bipolar true-differen-
tial results and temperature-sensor results are available
in two’s complement format, while all other results are in
binary.
A high-to-low transition on CS initiates the data-input
operation. Serial communications to the ADC always
begin with an 8-bit command byte (MSB first) loaded
from DIN. The command byte and the subsequent data
bytes are clocked from DIN into the serial interface on
the falling edge of SCLK. The serial-interface and fast-
interface circuitry is common to the ADC, DAC, and
GPIO sections. The content of the command byte
determines whether the SPI port should expect 8, 16, or
24 bits and whether the data is intended for the ADC,
DAC, or GPIOs (if applicable). See Table 1. Driving CS
high resets the serial interface.
The conversion register controls ADC channel selec-
tion, ADC scan mode, and temperature-measurement
requests. See Table 4 for information on writing to the
conversion register. The setup register controls the
clock mode, reference, and unipolar/bipolar ADC con-
figuration. Use a second byte, following the first, to
write to the unipolar-mode or bipolar-mode registers.
See Table 5 for details of the setup register and see
Tables 6, 7, and 8 for setting the unipolar- and bipolar-
mode registers. Hold CS low between the command
byte and the second and third byte. The ADC averag-
ing register is specific to the ADC. See Table 9 to
address that register. Table 11 shows the details of the
reset register.
Begin a write to the DAC by writing 0001XXXX as a
command byte. The last 4 bits of this command byte
are don’t-care bits. Write another 2 bytes (holding CS
low) to the DAC interface register following the com-
mand byte to select the appropriate DAC and the data
to be written to it. See the DAC Serial Interface section
and Tables 10, 17, and 18.
Write to the GPIOs (if applicable) by issuing a command
byte to the appropriate register. Writing to the
MAX1221/MAX1343 GPIOs requires 1 additional byte fol-
lowing the command byte. See Tables 12–16 for details
on GPIO configuration, writes, and reads. See the GPIO
Command section. Command bytes written to the
GPIOs on devices without GPIOs are ignored.