MAX1243BCSA Maxim Integrated Products, MAX1243BCSA Datasheet - Page 22

• Manufacturer Part Number: MAX1243BCSA
• Description: ADC (A/D Converters) Integrated Circuits (ICs)
• Manufacturer: Maxim Integrated Products

Specifications of MAX1243BCSA

• Number Of Adc Inputs: 1
• Architecture: SAR
• Conversion Rate: 73 KSPs
• Resolution: 10 bit
• Input Type: Voltage
• Interface Type: 3-Wire (SPI, QSPI, Microwire)
• Voltage Reference: External
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 2.7 V
• Maximum Power Dissipation: 471 mW
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: SO-8
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: No

12-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
LSB per degree. See the Temperature Measurements
section for details on converting the digital code to a tem-
perature.
In addition to the 12-bit ADC, the MAX1221/MAX1223/
MAX1343 also include eight (MAX1221/MAX1223) or
four (MAX1343) voltage-output, 12-bit, monotonic DACs
with less than 4 LSB integral nonlinearity error and less
than 1 LSB differential nonlinearity error. Each DAC has
a 2µs settling time and ultra-low glitch energy (4nV
The 12-bit DAC code is unipolar binary with 1 LSB =
V
Figure 1 shows the functional diagram of the MAX1221.
The shift register converts a serial 16-bit word to parallel
data for each input register operating with a clock rate
up to 25MHz. The SPI-compatible digital interface to the
shift register consists of CS, SCLK, DIN, and DOUT.
Serial data at DIN is loaded on the falling edge of SCLK.
Pull CS low to begin a write sequence. Begin a write to
the DAC by writing 0001XXXX as a command byte. The
last 4 bits of the DAC select register are don’t-care bits.
See Table 10. Write another 2 bytes to the DAC inter-
face register following the command byte to select the
appropriate DAC and the data to be written to it. See
Tables 17 and 18.
The double-buffered DACs include an input and a DAC
register. The input registers are directly connected to the
shift register and hold the result of the most recent write
operation. The 12-bit DAC registers hold the current out-
put code for the respective DAC. Data can be transferred
from the input registers to the DAC registers by pulling
LDAC low or by writing the appropriate DAC command
sequence at DIN. See Table 17. The outputs of the DACs
are buffered through eight (MAX1221/MAX1223) or four
(MAX1343) rail-to-rail op amps.
The MAX1221/MAX1223/MAX1343 DAC output-voltage
range is based on the internal reference or an external
reference. Write to the setup register (see Table 5) to
program the reference. If using an external voltage
reference, bypass REF1 with a 0.1µF capacitor to
AGND. The internal reference is 2.5V. When using an
external reference on any of these devices, the voltage
range is 0.7V to AV
See Table 2 for various analog outputs from the DAC.
The state of the RES_SEL input determines the wake-up
state of the DAC outputs. Connect RES_SEL to AV
22
REF
______________________________________________________________________________________
/ 4096.
DD
.
DAC Power-On Wake-Up Modes
DAC Transfer Function
DAC Digital Interface
12-Bit DAC
DD
•
s).
or
AGND upon power-up to be sure the DAC outputs
wake up to a known state. Connect RES_SEL to AGND
to wake up all DAC outputs at 000h. While RES_SEL is
low, the 100kΩ internal resistor pulls the DAC outputs to
AGND and the output buffers are powered down.
Connect RES_SEL to AV
at FFFh. While RES_SEL is high, the 100kΩ pullup
resistor pulls the DAC outputs to V
buffers are powered down.
See Table 18 for a description of the DAC power-up
and power-down modes.
In addition to the internal ADC and DAC, the
MAX1221/MAX1343 also provide four GPIO channels,
GPIOA0, GPIOA1, GPIOC0, GPIOC1. Read and write to
the GPIOs as detailed in Table 1 and Tables 12–16. Also,
see the GPIO Command section. See Figures 11 and 12
for GPIO timing.
Write to the GPIOs by writing a command byte to the
GPIO command register. Write a single data byte to the
MAX1221/MAX1343 following the command byte.
The GPIOs can sink and source current. GPIOA0 and
GPIOA1 can sink and source up to 15mA. GPIOC0 and
GPIOC1 can sink 4mA and source 2mA. See Table 3.
Table 2. DAC Output Code Table
MSB
1111
1000
1000
0111
0000
0000
DAC CONTENTS
1111
0000
0000
0111
0000
0000
1111
0001
0000
0111
0001
0000
LSB
DD
to wake up all DAC outputs
+
V
REF
ANALOG OUTPUT
DAC Power-Up Modes
+
+
+
+
REF1
⎛
⎜
⎝
V
V
V
V
REF
2048
4096
REF
REF
REF
and the output
⎛
⎜
⎝
⎛
⎜
⎝
⎛
⎜
⎝
⎛
⎜
⎝
⎞
⎟ =
⎠
0
2047
4096
4095
4096
2049
4096
4096
1
⎛
⎜
⎝
+
⎞
⎟
⎠
⎞
⎟
⎠
⎞
⎟
⎠
⎞
⎟
⎠
GPIOs
V
2
REF
⎞
⎟
⎠